Memory Controller Auto Mode Isolation for Test Reliability
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Solution Overview
Problem
Current memory systems face challenges in improving the reliability of test operations, particularly in miniaturized systems, where Built-In Self Test (BIST) methods often interfere with auto refresh and precharge modes, leading to interruptions during testing.
Innovation Solution
A memory controller with a mode register capable of inactivating and activating auto refresh and precharge modes, allowing the system to enter a test mode, perform tests, and then revert to auto modes, thereby isolating test operations and reducing interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If BIST method is used to perform test operation in memory system itself, then test operation is simplified and external test devices are reduced, but auto refresh and precharge modes are interfered with leading to test operation interruptions
Solution Approach 1:
The patent applies preliminary action by inactivating auto refresh and precharge modes before entering test mode. The memory controller proactively disables these modes in advance of the test operation to prevent potential interruptions, ensuring the test can complete without interference from automatic refresh or precharge events.
Solution Approach 2:
The patent implements dynamics by dynamically changing the state of auto refresh and precharge modes based on the test operation status. The modes are inactivated before test mode entry and reactivated after test mode exit, allowing the system to adapt its behavior according to whether it is in normal operation or test mode.
2Productivity
If auto refresh and precharge modes are active during test operation, then normal memory operations are maintained, but test operation reliability is reduced due to mode interference
Solution Approach 1:
The patent applies segmentation by separating normal operation modes from test operation modes in time. Auto refresh and precharge modes are active during normal operations but are inactivated during test operations, creating distinct operational segments that prevent interference between testing and normal memory functions.
Solution Approach 2:
The memory controller performs preliminary action by disabling auto refresh and precharge modes before initiating the test operation. This proactive measure ensures that these modes cannot interfere with the test while still allowing the memory to maintain other operational states.
3Ease of operation
If test mode is entered without inactivating auto modes, then mode switching is simplified, but test accuracy is reduced due to mode interference
Solution Approach 1:
The patent applies preliminary action by inactivating auto refresh and precharge modes before entering test mode. This ensures that the test environment is properly prepared and isolated from potential interruptions, thereby improving test accuracy without significantly complicating the mode switching process.
Data Source
AI summary
A memory system and an operating method thereof are provided. The memory system includes a storage device including a mode register suitable for activating or inactivating an auto mode and a memory suitable for storing data, and a storage device controller controlling the mode register to enter a test mode, after inactivating the auto mode, during a test operation of the storage device, and controlling the mode register to activate the auto mode again when the test operation of the storage device is completed.