Memory Controller Backup Address Access Information for Non-Volatile Storage
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Solution Overview
Problem
In rewritable non-volatile memory storage devices, data errors can occur during system restarts due to undetected errors in physical pages, leading to incorrect data being sent to the host system when the logical access address cannot be determined.
Innovation Solution
A data writing method that backs up address access information by writing data and corresponding address access information into a substitute physical unit, allowing for identification of logical pages during system restarts and preventing incorrect data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is written into physical pages without backup mechanism, then writing speed is fast and device complexity is low, but data reliability deteriorates when errors occur during system restart
Solution Approach 1:
The patent creates a backup copy of address access information by writing the same information into both the current physical page and a subsequent physical page. This copying mechanism ensures that if an error occurs in one page, the backup copy in the next page can be used to retrieve the correct logical access address, thereby improving data reliability without requiring complex additional hardware structures.
Solution Approach 2:
The patent performs preliminary backup of address access information during the data writing process itself. By proactively writing backup information into the next physical page before any potential error occurs, the system ensures that recovery information is already available if a crash or error happens during system restart, eliminating the need for complex post-error analysis structures.
2Loss of information
If address access information is not backed up, then device complexity remains low, but loss of information occurs when physical pages are scanned after restart
Solution Approach 1:
The patent prevents information loss by creating a duplicate copy of the address access information in the next physical page. When the system restarts and scans physical pages, if the original address information is corrupted or lost, the copied information in the subsequent page serves as a fallback, ensuring that the logical access address can always be recovered without losing critical information.
Solution Approach 2:
The patent prepares compensatory backup information in advance by writing it into the next physical page during normal operation. This beforehand cushioning ensures that if information loss occurs due to errors during system restart, the backup copy is already in place to compensate for the loss, preventing information loss without requiring complex real-time recovery mechanisms.
3Measurement precision
If error detection is performed on all physical pages during restart, then data accuracy improves, but processing time increases
Solution Approach 1:
The patent performs preliminary error detection on the backup address access information stored in the next physical page during system restart. By checking the backup information first, the system can quickly identify whether the primary information is corrupted without needing to scan and verify every single physical page, thereby improving measurement precision while reducing the time loss during restart.
Solution Approach 2:
The patent applies partial error detection by focusing verification efforts on the backup address access information in the next physical page rather than performing exhaustive error detection on all physical pages. This selective verification approach provides sufficient error detection capability to ensure data accuracy while significantly reducing the processing time required during system restart.
Data Source
AI summary
A memory storage device, a memory controller, and a data writing method are provided. The memory storage device has a rewritable non-volatile memory chip including a plurality of physical units, and each of the physical units has a plurality of physical pages. The data writing method includes configuring a plurality of logical units to be mapped to a portion of the physical units, and each of the logical unit has a plurality of logical pages. The data writing method also includes receiving a first write data from a host system and writing the first write data into the ith physical page in a substitute physical unit selected from the physical units. The data writing method further includes writing a first address access information corresponding to the first write data and a second address access information into the ith physical page. Herein i is a positive integer.