Memory Controller Bad Cell Identification via Pattern Testing
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Solution Overview
Problem
Memory devices, such as ECC memory devices, face uncorrectable errors due to hardware failures in memory cells, which cannot be corrected using existing error-correcting codes, leading to the need for replacing the device without identifying the root cause.
Innovation Solution
A memory controller is configured to write patterned data to memory cells, compare the stored data with the patterned data, and identify bad memory cells causing uncorrectable errors, allowing these cells to be avoided or repaired during subsequent operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error-correcting codes are used to detect and correct errors in stored data, then data integrity is improved, but uncorrectable errors from multiple bit corruptions cannot be resolved and require device replacement
Solution Approach 1:
The patent segments the memory device into individual addressable memory cells and systematically tests each cell by writing known test patterns (e.g., all 0s, all 1s, alternating patterns) to identify specific bad cells. This segmentation allows pinpointing exact failing cells rather than replacing the entire device, resolving the contradiction between maintaining data integrity and avoiding full device replacement.
Solution Approach 2:
The patent performs preliminary identification and mapping of bad memory cells before they cause uncorrectable errors in operational data. By proactively testing and creating a bad cell map in advance, the system prevents future data loss and avoids the need for device replacement when errors occur, thus improving reliability while enabling repair through bad cell avoidance.
2Reliability
If memory devices are replaced when uncorrectable errors occur, then data integrity is maintained, but device lifespan is reduced and replacement costs increase
Solution Approach 1:
The patent extracts and identifies specific bad memory cells from the overall memory device through systematic testing with known patterns. By separating the identification of bad cells from the functional good cells, the system can continue using the majority of the device while avoiding the extracted bad portions, thereby extending device lifespan without compromising data integrity.
Solution Approach 2:
The patent changes the operational parameters of the memory device by dynamically avoiding addresses corresponding to bad cells identified through pattern testing. This parameter change in usage patterns (skipping bad addresses) allows the device to continue functioning within its original hardware constraints, extending its operational life while maintaining reliability.
3Measurement precision
If systematic testing with multiple patterns is performed to identify bad memory cells, then identification accuracy is improved, but testing time and complexity increase
Solution Approach 1:
The patent applies partial testing by focusing on specific test patterns that are most effective at identifying different types of cell failures (e.g., 0x00, 0xFF, 0x55, 0xAA patterns). Rather than exhaustively testing every possible pattern, the system uses a curated set of patterns that provide sufficient identification accuracy while minimizing testing time, balancing precision with efficiency.
Data Source
AI summary
Technologies are provided for runtime identification of bad memory cells. An uncorrectable error can be detected in data stored in a plurality of memory cells of a memory device. Patterned data can be written to the plurality of memory cells that stored the data in which the uncorrectable error was detected. The data stored in the plurality of memory cells can be read and compared to the patterned data. One or more of the memory cells can be identified as bad memory cells based on differences between the patterned data and the data read from the plurality of memory cells. In at least some embodiments, the one or more identified bad memory cells can be omitted from subsequent data storage operations. Additionally or alternatively, the one or more identified bad memory cells can be repaired, for example, by using a post-package repair operation.