Memory Controller Bad Page Map Remapping

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Solution Overview

Problem

Nonvolatile memory devices face wear out issues due to frequent erase or program operations, leading to localized defective cells, which existing memory management systems inadequately address, resulting in increased overhead and unusable memory pages.

Innovation Solution

A memory system with a controller that remaps logical addresses to different pages and stores dummy data in bad pages, using a bad page map updated based on erase operation counts and bit error rates to manage memory cells on a page-by-page basis, preventing data storage in damaged pages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If remapping addresses of defective regions to non-defective regions is performed, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvememory reliabilityVSAvoidmemory management overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the memory management approach into two distinct segments: a bad page map structure that tracks defective pages, and a remapping mechanism that redirects logical addresses away from bad pages. This segmentation allows the system to maintain reliability through targeted remapping while keeping the overall management complexity localized and manageable, rather than requiring system-wide complexity increases.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bad page map serves as an intermediary data structure between the logical address space and the physical memory pages. This intermediary layer enables the controller to intercept address translations and redirect them away from defective pages without requiring complex changes to the underlying memory architecture or control logic.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If block-level wear management is used, then manufacturing precision is maintained, but productivity decreases

Engineering Contradiction:
Improvememory block uniformityVSAvoidusable memory capacity
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent segments the memory management granularity from the block level down to the page level. Instead of managing wear and defects at the block level where all pages are treated uniformly, the system tracks and manages individual pages within blocks. This allows partially worn blocks to still be utilized through page-level remapping, thereby increasing usable memory capacity while maintaining the physical block structure for manufacturing purposes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies local quality management by tracking the wear and defect status of individual pages within blocks rather than treating entire blocks uniformly. The bad page map maintains page-level information about wear cycles and defects, enabling selective remapping of only the problematic pages while leaving healthy pages in the block available for use, thus maximizing productivity.

Inventive Principle:
Principle #3Local quality

3Productivity

If page-by-page remapping is implemented, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improveusable memory capacityVSAvoidaddress mapping complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The bad page map essentially creates a copy or mirror of the page status information that can be queried during address mapping operations. This copied information structure allows the controller to make remapping decisions based on pre-collected wear and defect data without requiring complex real-time analysis, thereby managing the complexity of page-by-page remapping through information duplication.

Inventive Principle:
Principle #26Copying

4Reliability

If conservative remapping is used, then reliability is improved, but loss of time increases

Engineering Contradiction:
Improvedata integrityVSAvoidaddress mapping time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by tracking wear cycles and identifying bad pages in advance through the bad page map, before actual data storage operations occur. This pre-characterization of page reliability allows the remapping mechanism to quickly redirect addresses away from problematic pages without requiring time-consuming real-time reliability assessments during data operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9348708B2Memory system performing address mapping according to bad page map
Publication Date: 2016.05.24 SAMSUNG ELECTRONICS CO LTD
  • US9348708B2 patent drawing
  • US9348708B2 patent drawing
  • US9348708B2 patent drawing

AI summary

A memory system comprises a nonvolatile memory comprising a memory block having multiple pages, and a controller configured to control the nonvolatile memory to store data in the memory block according to a command and logical address received from an external source. The controller is configured to determine whether the logical address is currently mapped to a bad page of the memory block by referring to a bad page map, and as a consequence of determining that the logical address corresponds to the bad page, remaps the logical address to a different page and stores dummy data in the bad page.