Memory Controller Bit-Level Error Correction
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Solution Overview
Problem
Conventional memory controllers are unable to effectively correct uncorrectable errors in data stored in memory devices, often processing entire memory blocks as bad blocks, which can lead to inefficiencies and data loss.
Innovation Solution
A memory controller that includes a bit counter, flash translation layer, additional data generator, comparator, and error corrector to generate judgment and detection data, compare them, and correct uncorrectable errors by changing specific bits within the read data rather than marking entire blocks as bad, thereby allowing for precise error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory controllers mark entire memory blocks as bad when errors are detected, then error handling is simplified, but data loss increases and storage efficiency decreases
Solution Approach 1:
The patent segments the error correction process from the traditional block-level approach to bit-level operations. Instead of marking entire memory blocks as bad when errors occur, the system identifies and corrects only the specific erroneous bits within data packets, preserving the majority of functional data in each block and maintaining higher storage efficiency while improving reliability
Solution Approach 2:
The invention applies local quality by implementing targeted error correction at the bit level rather than uniformly treating entire blocks. The memory controller generates judgment data and detection data to identify specific erroneous bits, then applies correction only to those localized positions, optimizing the balance between error handling and data preservation
2Reliability
If bit-level error correction is implemented, then data integrity improves, but device complexity increases
Solution Approach 1:
The patent implements preliminary action by pre-generating judgment data during the programming phase and storing it in the memory device. This judgment data contains information about the programmed data state, which is later used during reading to quickly identify errors without requiring complex real-time analysis, thus improving data integrity while managing controller complexity
Solution Approach 2:
The invention introduces judgment data as an intermediary element that facilitates error detection and correction. This intermediate data structure serves as a mediator between the programmed data and the correction process, enabling the memory controller to identify and correct errors efficiently without directly analyzing the entire data structure, thereby balancing data integrity with manageable complexity
3Productivity
If conventional error correction methods are used, then processing speed is maintained, but uncorrectable errors cannot be corrected
Solution Approach 1:
The patent implements feedback mechanisms by generating detection data from read data and comparing it with judgment data stored in the memory device. This feedback loop enables the memory controller to identify uncorrectable errors that conventional methods would miss, while the comparison-based approach maintains processing speed by avoiding exhaustive analysis of all data bits
Data Source
AI summary
Provided herein may be a memory controller and a method of operating the memory controller. The memory controller may control a memory device that stores data, and may include a bit counter configured to generate a count value by counting any one of bits in a programmed state and an erased state contained in the data, a flash translation layer configured to generate page information indicating an address of the data stored in the memory device, an additional data generator configured to generate judgment data for determining whether the data has changed, based on the count value and the page information, a comparator configured to generate comparison information by comparing the judgment data with detection data generated based on data read from the memory device, and a read data controller configured to perform an operation of correcting an error in the read data based on the comparison information.