Memory Controller Bit Flip Correction History
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Solution Overview
Problem
Dynamic Random Access Memory (DRAM) devices experience reduced reliability due to data loss during operation, as errors in stored data cannot be corrected by existing error correction codes when the number of error bits exceeds the correction capability, leading to system faults and interrupted operations.
Innovation Solution
A memory controller method that generates flip data by performing bit flip operations based on correction history information, allowing for additional error correction attempts, thereby reducing the number of error bits below the error correction code's capability, ensuring reliable data retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction code is applied to correct errors in data, then error correction capability is improved, but the number of correctable error bits is limited and cannot handle errors exceeding the correction capability
Solution Approach 1:
The patent performs preliminary bit flip operations on data before applying error correction code. By proactively flipping bits at addresses stored in the correction history table (which records previously corrected error locations), the system prepares the data in a state that enables the ECC to successfully correct errors that would otherwise exceed its correction capability. This preliminary action transforms uncorrectable error patterns into correctable ones.
Solution Approach 2:
The patent implements a feedback mechanism using a correction history table that stores addresses of previously corrected error bits. When new data is read, the system references this history table to identify likely error locations and performs targeted bit flips. This feedback loop allows the system to learn from past errors and improve its error correction effectiveness for subsequent operations, enabling handling of error patterns beyond the original ECC capability.
2Reliability
If bit flip operation is performed based on correction history information, then errors exceeding correction capability can be corrected, but additional operations increase processing time
Solution Approach 1:
The system performs preliminary bit flip operations using addresses from the correction history table before the ECC correction process. By pre-flipping bits at historically problematic locations, the system reduces the actual work needed during the main correction phase, potentially decreasing overall processing time despite the added preliminary step.
Solution Approach 2:
The correction history table serves as a self-service mechanism that automatically identifies likely error locations based on past correction patterns. This eliminates the need for exhaustive error checking across all data bits, as the system autonomously focuses correction efforts on the most probable error locations, thereby reducing processing time while maintaining high correction success rates.
Data Source
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AI summary
Disclosed is an operation method of a memory controller controlling a memory device. The operation method includes loading raw data from the memory device, performing a 0th error correction operation on the raw data, generating first flip data by performing a first bit flip operation on the raw data based on a correction history table, when an error of the raw data is not corrected through the 0th error correction operation, and performing a first error correction operation on the first flip data, and the correction history table includes correction addresses indicating locations of one or more memory cells in the memory device, which are associated with previously corrected error bits.