Memory Controller Error Correction via Bit Flip History
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Solution Overview
Problem
Dynamic Random Access Memory (DRAM) devices experience reduced reliability due to data loss during operation, as errors in memory cells are not effectively corrected, leading to system faults and interrupted operations.
Innovation Solution
A memory controller method that performs error correction operations by loading data, applying a first error correction, generating flip data based on correction history information, and performing a second error correction, thereby improving data reliability by reducing error bits through bit flip operations targeted at specific memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a first error correction operation is performed on data, then errors are corrected to some extent, but errors exceeding the correction level remain uncorrected, reducing reliability
Solution Approach 1:
The patent performs a bit flip operation on suspected error bits before the second error correction operation. This preliminary action is based on correction history information that identifies bits that previously required correction, allowing the system to proactively address potential errors before they affect data integrity.
Solution Approach 2:
The patent uses correction history information as feedback from previous error correction operations. This feedback mechanism allows the system to learn from past errors and adjust the bit flip operation accordingly, improving the effectiveness of subsequent error correction while avoiding unnecessary operations on bits that don't require correction.
2Reliability
If bit flip operations are performed based on correction history, then errors are corrected more effectively, but the process time increases
Solution Approach 1:
The patent applies bit flip operations only to specific bits identified in the correction history information, rather than performing operations on all bits. This localized approach ensures that correction efforts are concentrated on bits that actually require correction, improving effectiveness while minimizing unnecessary processing time.
3Reliability
If correction history information is maintained and used, then targeted bit flip operations can be performed, but memory space is consumed
Solution Approach 1:
The patent extracts only the necessary correction history information needed to perform targeted bit flip operations. By extracting and storing only the essential correction data rather than complete operation logs, the system maintains correction precision while minimizing memory space consumption.
Data Source
AI summary
Disclosed is an operation method of a memory controller controlling a memory device. The operation method includes loading raw data from the memory device, performing a 0th error correction operation on the raw data, generating first flip data by performing a first bit flip operation on the raw data based on a correction history table, when an error of the raw data is not corrected through the 0th error correction operation, and performing a first error correction operation on the first flip data, and the correction history table includes correction addresses indicating locations of one or more memory cells in the memory device, which are associated with previously corrected error bits.


