Memory Controller Soft-Decision Bit Reduction for Reliable Flash Decoding
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Solution Overview
Problem
Existing flash memory devices with multi-level cells face increased read invalidation rates and computational load due to high bit soft decision read operations, which compromise data reliability and increase reading time.
Innovation Solution
A memory controller that converts multi-bit decision data into fewer bits for decoding, optimizing reliability without significantly increasing computational load by using a mapper to convert M-bit data into N-bit data for decoding, where N is less than M, and performing additional decoding if initial decoding fails.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high bit soft decision read operation is performed to decrease read invalidation rate, then data reliability is improved, but computational load and reading time rapidly increase
Solution Approach 1:
The patent extracts only the necessary portion of soft decision data (N bits) from the full M-bit decision data for decoding operations. By taking out only the essential information needed for error correction rather than processing all available data, the computational load is reduced while maintaining the reliability benefits of soft decision reading.
Solution Approach 2:
The patent applies partial action by using a subset (N bits) of the available soft decision data (M bits) for decoding. This partial usage of data provides sufficient correction capability to improve reliability without requiring the full computational resources that would be needed to process all M bits, thus avoiding excessive computational load.
2Reliability
If high bit soft decision read operation is performed to decrease read invalidation rate, then data reliability is improved, but reading time increases
Solution Approach 1:
The patent extracts only the necessary N bits from M-bit soft decision data for decoding operations. By extracting only the essential information needed for error correction rather than processing all available data, the reading time is reduced while maintaining the reliability benefits of soft decision reading.
Solution Approach 2:
The patent applies partial action by using a subset (N bits) of the available soft decision data (M bits) for decoding. This partial usage provides sufficient correction capability to improve reliability without requiring the full processing time that would be needed to analyze all M bits, thus reducing reading time.
3Quantity of substance
If multi-bit data is stored in one memory cell to increase storage capacity, then storage density is improved, but read invalidation rate increases
Solution Approach 1:
The patent introduces soft decision data as an intermediary between the stored multi-bit data and the decoding process. This intermediary provides additional information about the reliability of each bit, enabling the decoder to distinguish between confident and uncertain readings, thereby reducing read invalidation rates while maintaining high storage capacity.
Solution Approach 2:
The patent changes the parameter of decision data from traditional hard decision (1 bit) to soft decision (M bits, where M>1). This parameter change provides richer information about signal reliability, enabling better error correction for multi-level cells and reducing read invalidation rates while preserving the high storage capacity benefits of multi-bit per cell operation.
Data Source
AI summary
Provided is an operating method of a memory controller which comprises receiving first decision data of M bits from a memory device, where M is a natural number; converting the M-bit first decision data into second decision data of N bits, where N is a natural number less than M; and attempting a first decoding using the second decision data.