Memory Controller Block Selection for Interference-Aware Programming

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Solution Overview

Problem

In memory systems, adjacent programmed and erased cells electrically interfere during read operations, leading to increased error data and requiring more read operations, which deteriorates reliability and increases time required for the read operation.

Innovation Solution

A controller with a programmed capacity table and block selector that identifies free or open status blocks based on data capacity, optimizing programming to reduce error data and improve reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is programmed into memory blocks with mixed programmed and erased cells, then storage capacity is utilized, but electrical interference between adjacent cells increases error data during read operations

Engineering Contradiction:

Improveread operation reliabilityVSAvoidread operation speed

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The controller performs preliminary classification of memory blocks into free status blocks (all cells erased) and open status blocks (mixed programmed and erased cells) before programming operations. This preliminary categorization enables the controller to make informed decisions about where to program data, avoiding placements that would create electrical interference issues during subsequent read operations.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent applies different programming strategies to different types of memory blocks based on their local characteristics. Free status blocks receive data programming that fills previously erased cells, while open status blocks receive data programming that avoids cells adjacent to existing programmed cells. This local differentiation reduces electrical interference and improves read operation reliability.

Inventive Principle:

Principle #3Local quality

2Reliability

If multiple read operations are performed to correct error data, then data accuracy is improved, but time required for read operations increases

Engineering Contradiction:

Improvedata accuracyVSAvoidread operation time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The controller performs preliminary classification of memory blocks and strategic data placement before read operations occur. By pre-identifying free status blocks and open status blocks, and by strategically selecting where to program data, the controller minimizes the occurrence of electrical interference-induced errors, thereby reducing the need for multiple corrective read operations.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent converts the potential harm of electrical interference into a benefit by using the classification of memory block statuses to make intelligent programming decisions. By understanding which blocks are free status and which are open status, the controller can strategically place data to minimize interference, effectively using the block status information to prevent errors rather than just correcting them.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If data is programmed into open status blocks with existing programmed cells, then storage utilization is improved, but electrical interference increases error data

Engineering Contradiction:

Improvestorage utilizationVSAvoidread operation reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The controller changes the programming parameters and strategies based on the memory block status. For open status blocks, the controller modifies the programming approach to avoid creating adjacent programmed cells that would cause electrical interference. This parameter adaptation allows the system to maintain high storage utilization while minimizing read operation errors.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250370644A1Controller, memory system including controller, and method of operating memory system

Publication Date: 2025.12.04 SK HYNIX INC

AI summary

Provided herein may be a controller, a memory system including the controller, and a method of operating the memory system. The controller may include a programmed capacity table including information on a capacity of data programmed to memory blocks included in a memory device, a block selector configured to compare a capacity of data stored in a buffer memory with a reference capacity, and select, based on a result of a comparison, one of memory blocks designated as a free status block and or an open status block, among memory blocks, and a command generator configured to output a command for programming the data to the selected memory block.