Memory Controller Dynamic Erased Block Management

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Solution Overview

Problem

Current memory systems face challenges in maintaining data reliability and operation performance due to uncorrectable errors in erased blocks, which occur when these blocks are left in an erased state for extended periods, leading to reduced storage reliability and increased collision frequencies between erase, read, and write operations.

Innovation Solution

A memory system with a memory controller that dynamically manages block states, including an erased state, by calculating the optimal maximum number of blocks in the erased state based on writing progress and time limits, and performs erase operations to prevent excessive uncorrectable errors, thereby enhancing data reliability and operation efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If blocks are left in the erased state for extended periods to optimize operation performance, then erase operation frequency is reduced, but uncorrectable errors increase and data reliability deteriorates

Engineering Contradiction:
Improveoperation performanceVSAvoiddata reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic management of erased blocks by continuously monitoring the elapsed time since erasure and the current number of erased blocks. The memory controller dynamically determines whether to perform additional erase operations based on real-time conditions, transitioning from static time-based management to dynamic condition-based management. This resolves the contradiction by adapting the erase strategy to current system state, maintaining reliability while optimizing performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces a feedback mechanism where the memory controller monitors the number of erased blocks and the elapsed time, then uses this information to determine subsequent erase operations. The controller receives feedback about the current state (number of erased blocks, time elapsed) and adjusts its behavior accordingly. This closed-loop control resolves the contradiction by continuously adapting to maintain both reliability and performance.

Inventive Principle:
Principle #23Feedback

2Productivity

If the number of blocks in the erased state is increased to reduce collision frequencies between operations, then operation efficiency improves, but the risk of uncorrectable errors increases

Engineering Contradiction:
Improveoperation efficiencyVSAvoiduncorrectable errors
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The memory controller performs self-service by autonomously monitoring its own state (number of erased blocks, elapsed time) and making decisions about when to perform erase operations without external intervention. The controller serves itself by detecting when the number of erased blocks exceeds the determined threshold and automatically initiating erase operations, resolving the contradiction through autonomous adaptive management.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent changes the management parameter from fixed time intervals to a dynamic threshold based on the number of erased blocks and elapsed time. The controller determines a maximum number of blocks that can be in the erased state based on the time elapsed since erasure, and adjusts this threshold dynamically. This parameter change allows the system to optimize operation efficiency while maintaining reliability by adapting the erased block limit to current conditions.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11922038B2Memory system
Publication Date: 2024.03.05 KIOXIA CORP
  • US11922038B2 patent drawing
  • US11922038B2 patent drawing
  • US11922038B2 patent drawing

AI summary

A memory system includes a nonvolatile memory including blocks, and a memory controller. The memory controller is configured to set each of the blocks to be in one of a plurality of states, including first, second, third, and fourth states. The memory controller is configured to detect a predetermined condition related to at least one of an amount of data being written into blocks in the first state and state transition of a block, upon detection of the predetermined condition, determine a maximum number of blocks to be in the fourth state based on a length of time during which each block in the fourth state has been in the fourth state, and perform an erase operation to cause one or more blocks in the third state to transition to the fourth state when a current number of blocks in the fourth state is less than the maximum number.