Memory Controller Buffer Allocation for Power Failure Data Backup

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Solution Overview

Problem

Existing memory controllers face challenges in ensuring data reliability and recovery during power failures, particularly in volatile memory systems where data loss can occur due to sudden power cuts or incorrect voltage levels, and there is a need for improved write performance and data processing efficiency in storage devices.

Innovation Solution

A memory controller with a buffer memory and buffer memory controller that allocates buffer areas based on power information from both the host and an auxiliary power device, generating an area map table for logical to physical address mapping, and includes features for pre-data storage and backup to ensure data integrity and recovery during power failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is stored in volatile memory for fast access, then write performance is improved, but data reliability deteriorates during power failures

Engineering Contradiction:
Improvewrite performanceVSAvoiddata reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary actions by allocating buffer areas in advance and preparing backup mechanisms before power failures occur. The buffer memory controller pre-allocates buffer areas corresponding to memory areas and maintains area map tables, so that when power failure happens, data can be immediately backed up without interruption or data loss.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by introducing an auxiliary power device that provides power reserves specifically for data backup operations during main power failures. This cushioning mechanism ensures that even when main power is cut off, the system can maintain critical operations and complete data backup to non-volatile memory, preventing data loss while maintaining fast write performance during normal operation.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If buffer memory allocation is increased to improve data recovery, then data recovery performance is improved, but device complexity increases

Engineering Contradiction:
Improvedata recovery performanceVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system segments the buffer memory into multiple buffer areas that correspond to different memory areas, each managed independently by the buffer memory controller. This segmentation allows for targeted data recovery operations and simplified management of the area map table, reducing the complexity of tracking and recovering data across the entire memory space while improving recovery performance for specific regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The buffer memory controller acts as an intermediary between the host memory manager and the physical memory areas. It receives buffer allocation requests, determines appropriate buffer areas based on power information, and manages the mapping between logical and physical addresses. This intermediary role simplifies the overall system architecture by centralizing buffer management functions and reducing the complexity of direct host-memory coordination during power failure scenarios.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If power information from auxiliary power device is used for buffer allocation, then data reliability is improved, but use of energy increases

Engineering Contradiction:
Improvedata reliabilityVSAvoiduse of energy
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system applies partial action by allocating buffer areas selectively based on power information rather than reserving the entire buffer memory capacity. The buffer memory controller determines buffer area allocation according to the available power from auxiliary power devices, allocating buffer resources proportionally to actual needs and power availability, thus avoiding excessive energy consumption while maintaining adequate data reliability for critical operations.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12158843B2Storage device and method of operating the same
Publication Date: 2024.12.03 SK HYNIX INC
  • US12158843B2 patent drawing
  • US12158843B2 patent drawing
  • US12158843B2 patent drawing

AI summary

The present technology includes a storage device including a memory device including a first storage region and a second storage region and a memory controller configured to, in response to a write request in the first storage region from an external host, acquire data stored the first region based on a fail prediction information provided from the memory device and to perform a write operation corresponding to the write request, wherein the first storage region and the second storage region are allocated according to logical addresses of data to be stored in by requests of the external host.