Memory Controller Buffering Strategy for Low Power Mode
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Solution Overview
Problem
In mobile-type personal computers, frequent requests for transitioning to a low power consumption mode lead to excessive writing in non-volatile memory, potentially exhausting it and reducing reliability, while writing to volatile memory does not effectively minimize power consumption.
Innovation Solution
A memory system with a controller that selectively writes data to either a volatile or non-volatile storage unit, using two stages of low power consumption modes to manage power supply and reduce the number of writes to non-volatile memory by temporarily storing operation information in volatile memory and later transferring it to non-volatile memory when necessary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If management information and operation information are written in non-volatile memory every time a request for transition to low power consumption mode is issued, then reliability of return from low power consumption mode is ensured, but the number of writing operations to non-volatile memory increases excessively, leading to exhaustion and reduced reliability
Solution Approach 1:
The patent introduces a buffer memory (volatile memory) as an intermediary between the operation information and the non-volatile memory. Instead of directly writing to non-volatile memory every time, the system first stores operation information in the buffer memory, which then serves as a temporary holding area. This intermediary approach allows the system to reduce direct write operations to non-volatile memory while ensuring data is preserved for reliable return from low power consumption mode.
Solution Approach 2:
The patent implements preliminary action by storing management information and operation information in the buffer memory in advance, before transitioning to low power consumption mode. This preliminary storage ensures that when the system needs to return from low power consumption mode, the necessary information is already prepared in the buffer, eliminating the need for frequent write operations to non-volatile memory during each transition cycle.
2Duration of action of stationary object
If management information and operation information are written in volatile memory to reduce writing operations to non-volatile memory, then the lifetime of non-volatile memory is extended, but cancellation of conduction of volatile memory is prohibited, minimizing the effect of reducing power consumption
Solution Approach 1:
The patent applies dynamics by making the power supply to the buffer memory controllable and adjustable. The power supply control unit dynamically adjusts whether the buffer memory remains conductive based on the operational state. Specifically, the buffer memory is kept conductive only when necessary (during low power consumption mode or when return information is needed), and its conduction can be canceled when not needed, thus dynamically balancing between extending non-volatile memory lifetime and minimizing power consumption.
3Use of energy by moving object
If the system enters low power consumption mode frequently in response to host requests, then power consumption is reduced, but the frequency of writing to non-volatile memory increases, exhausting the memory and reducing system reliability
Solution Approach 1:
The buffer memory serves as a mediator that decouples the frequent low power consumption mode transitions from the non-volatile memory write operations. When the system frequently enters low power consumption mode, the operation information is stored in the buffer memory instead of being written to non-volatile memory each time. This intermediary mechanism allows frequent power saving transitions without proportionally increasing wear on the non-volatile memory, thus maintaining system reliability while achieving power consumption reduction.
Data Source
AI summary
According to one embodiment, a memory system includes a non-volatile first storage unit, a second storage unit, a third storage unit, and a controller. The controller is configured to selectively execute, following transition to a first mode, either a procedure of writing data of the second storage unit in the third storage unit, or a procedure of writing data of the third storage unit in the first storage unit while reducing power feed to the first and third storage units.