Memory Controller Busy Period Extension via Re-Transmission

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Solution Overview

Problem

Conventional memory systems face busy period time-outs due to mismatches between host-defined busy period durations and memory system operation periods, lacking a fundamental approach to extend busy periods effectively, leading to inefficient data processing.

Innovation Solution

A memory controller with a central processing unit that provides re-transmission control signals and an error check block to determine data errors, requesting error-correcting or extending re-transmissions to secure sufficient busy periods for data processing, thereby avoiding time-outs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of moving object

If the memory system uses host-defined busy period durations, then the host can control data transfer timing, but the memory system cannot complete long-duration operations (e.g., merge operations) within the limited busy period, causing time-outs

Engineering Contradiction:
Improvebusy period durationVSAvoidoperation completion reliability
Core Design Contradiction:
Duration of action of moving objectVSReliability

Solution Approach 1:

The memory controller requests re-transmission of data before the busy period expires, even if the data has been successfully received and stored. This preliminary action extends the busy period to allow completion of long-duration internal operations like merge operations, preventing time-outs while maintaining reliable operation completion

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism where the memory controller communicates with the host to request additional busy periods. This intermediary communication allows the memory system to negotiate extended time for internal operations without compromising the host's control over data transfer timing

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the memory system requests re-transmission for error correction, then data integrity is improved, but system efficiency deteriorates due to additional transmission operations

Engineering Contradiction:
Improvedata integrityVSAvoidsystem efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The memory controller requests re-transmission even when no errors are detected in the received data. This excessive action (requesting re-transmission beyond what error correction requires) serves the dual purpose of extending the busy period for internal operations while maintaining data integrity, with minimal impact on system efficiency since the re-transmitted data is already available in the buffer

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8738994B2Memory controller, memory system, and operating method
Publication Date: 2014.05.27 SAMSUNG ELECTRONICS CO LTD
  • US8738994B2 patent drawing
  • US8738994B2 patent drawing
  • US8738994B2 patent drawing

AI summary

A memory controller and method of operating same are described. The memory controller includes a central processing unit providing re-transmission control signal, an error check block determining whether an error exists in data received from a host and generating a corresponding error check signal, and a re-transmission request unit receiving the control signal and the error check signal, communicating a request to the host for an error-correcting re-transmission operation when an error exists in the received data, and communicating a request for an extending re-transmission operation when error does not exist in the received data.