Memory Controller Calibration for Write Strobe Timing and Voltage Margins

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Solution Overview

Problem

Existing memory subsystems face challenges in accurately determining an optimal reference voltage for distinguishing between logic 1 and logic 0 due to irregularly shaped eye patterns, which can complicate selecting an optimal sampling point, leading to increased error likelihood.

Innovation Solution

A calibration method that performs horizontal calibrations at varying reference voltages, assigns scores based on delay ranges, and applies penalty factors to adjust scores based on distance from a nominal reference voltage, concurrently with a background calibration using a ring oscillator to determine an optimal reference voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional sequential calibration methods are used to determine optimal reference voltage, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
Improvereference voltage determination accuracyVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent merges the reference voltage calibration process with the write strobe calibration process into a single concurrent operation. The calibration circuit performs both calibrations simultaneously by integrating the write strobe calibration timing into the reference voltage calibration sequence, thereby reducing total calibration time while maintaining the precision of reference voltage determination through the integrated eye pattern analysis

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The calibration circuit continues to perform useful calibration actions throughout the entire calibration window without idle periods. By initiating write strobe calibration at the start of the calibration window and continuously adjusting the write strobe delay while performing reference voltage calibration, the system maintains continuous useful action rather than sequential execution with waiting periods

Inventive Principle:
Principle #20Continuity of useful action

2Reliability

If multiple calibrations are performed sequentially to ensure accurate sampling, then reliability is improved, but productivity decreases

Engineering Contradiction:
Improvesampling accuracyVSAvoidsystem initialization speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent combines reference voltage calibration and write strobe calibration into a single integrated process. The calibration circuit executes both calibration routines concurrently, using the same calibration window and circuit resources to perform both functions, thereby improving system initialization speed without compromising the reliability of sampling accuracy through the maintained calibration precision

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If comprehensive calibration procedures are executed to handle irregular eye patterns, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveeye pattern analysis accuracyVSAvoidcalibration circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The calibration circuit is designed with multi-functionality to perform both reference voltage calibration and write strobe calibration using the same hardware resources. The circuit universally handles both calibration types within a single calibration window, reducing device complexity by eliminating duplicate dedicated circuits while maintaining the measurement precision needed for irregular eye patterns through integrated analysis

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12423009B2Concurrent write data strobe and reference voltage calibrations
Publication Date: 2025.09.23 APPLE INC
  • US12423009B2 patent drawing
  • US12423009B2 patent drawing
  • US12423009B2 patent drawing

AI summary

An apparatus for performing a write data strobe concurrent with a reference voltage calibration is disclosed. A memory controller circuit is configured to convey a write clock signal to a memory. The memory controller circuit includes a calibration circuit configured to send a first command to memory to initiate a calibration of the write clock signal and, after an amount of time has elapsed, receive a calibration value from the memory. The memory controller further includes a delay circuit configured to apply a delay to the write clock signal, wherein the calibration circuit is configured to complete calibration of the write clock signal by adjusting the delay applied to the write clock signal in accordance with the calibration value. The calibration circuit is further configured to perform a reference voltage calibration concurrent with the calibration of the write clock signal.