Memory Controller Calibration Alignment for Subsystem Availability

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Solution Overview

Problem

Memory subsystems in electronic systems face inefficiencies due to staggered calibration and refresh operations, which can lead to memory traffic stalls and reduced availability, as not all channels can be utilized simultaneously during these processes.

Innovation Solution

Concurrently aligning calibration segments and performing all-bank refreshes across all channels, making the memory subsystem unavailable for normal accesses during these operations, thereby ensuring all channels are available when these processes are not being performed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If calibration operations are performed on multiple channels in a staggered manner, then channel availability is maintained during calibration, but memory traffic stalls occur and overall availability is reduced

Engineering Contradiction:
Improvememory availabilityVSAvoidmemory traffic throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges calibration operations across all channels to execute concurrently rather than staggered sequentially. By aligning calibration segments in time and performing all-bank refreshes simultaneously with calibrations, the system consolidates memory unavailability into a single time window, thereby improving overall memory availability and eliminating traffic stalls that occur with staggered operations.

Inventive Principle:
Principle #5Merging (Combining)

2Speed

If all-bank refreshes are performed utilizing all channels concurrently, then refresh operation speed is improved, but memory becomes unavailable for normal accesses during the refresh

Engineering Contradiction:
Improverefresh operation speedVSAvoidmemory availability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent schedules calibration operations to complete before initiating all-bank refreshes, or aligns them to overlap completely. By performing calibrations in advance or simultaneously with refreshes, the system ensures that channel alignment is already established when refreshes begin, minimizing the duration of memory unavailability and allowing normal accesses to resume sooner.

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If calibration segments are aligned and performed concurrently across all channels, then overall calibration time is reduced, but all channels become unavailable during the calibration period

Engineering Contradiction:
Improvetotal calibration timeVSAvoidchannel availability
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent combines calibration operations across all channels into a single concurrent execution window, aligning calibration segments in time. This merging approach reduces the total time memory remains unavailable compared to staggered calibrations, and by performing all-bank refreshes simultaneously, the system consolidates unavailability into one brief period rather than extended staggered intervals.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9384820B1Aligning calibration segments for increased availability of memory subsystem
Publication Date: 2016.07.05 APPLE INC
  • US9384820B1 patent drawing
  • US9384820B1 patent drawing
  • US9384820B1 patent drawing

AI summary

A method and apparatus for aligning calibration segments for increased availability of a memory subsystem is disclosed. In one embodiment, a memory subsystem includes a memory and a memory controller coupled thereto via a number of independently operable channels (interfaces). The memory controller may convey on each of the channels at least one corresponding data strobe signal. The data strobe signal in each channel may be periodically calibrated. The memory controller may be configured to align the periodic calibrations in time so that they are performed concurrently instead of in a staggered manner. During the time the calibrations are performed on each channel, the memory may be unavailable for normal accesses.