Memory Controller Initialization to Shrink Memory Cell Area
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Solution Overview
Problem
Conventional memory circuits require multiple NAND gates for initial setting, leading to a large area occupancy and inefficient memory cell architecture.
Innovation Solution
A memory storage apparatus with a memory controller that performs initial setting based on the width of a data bus, eliminating the need for multiple NAND gates and optimizing the memory cell structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple NAND gates are used for initial setting in each memory cell, then the memory cell can receive setting and reset signals, but the area occupied by the memory circuit becomes large
Solution Approach 1:
The patent extracts the initial setting function from the memory cell level and moves it to the memory controller level. Instead of each memory cell containing multiple NAND gates for initial setting, the memory controller now performs the initial setting operation externally, eliminating the need for complex logic circuits within each memory cell and significantly reducing the memory circuit area.
Solution Approach 2:
The patent introduces the memory controller as an intermediary component that handles the initial setting operation. The memory controller receives initial setting data through the data bus and performs the setting operation, acting as a mediator between the external data source and the memory circuit, thereby simplifying the memory cell structure.
2Reliability
If multiple NAND gates are included in each memory cell for initial setting, then the memory cell can be initialized, but the memory cell architecture becomes complex
Solution Approach 1:
The patent extracts the initial setting logic (multiple NAND gates) from the memory cell architecture and relocates this functionality to the memory controller. This extraction simplifies the memory cell to its essential storage function while the memory controller handles the complex initialization logic externally.
Solution Approach 2:
The memory controller is designed to perform multiple functions including initial setting, data writing, and data reading. By making the memory controller multi-functional, the patent eliminates the need for dedicated initial setting circuits within each memory cell, as the memory controller can handle various operations including initialization.
3Reliability
If conventional memory cells with multiple NAND gates are used, then initial setting can be performed, but the initial setting efficiency is low
Solution Approach 1:
The memory controller acts as an intermediary that processes initial setting data through the data bus and performs the setting operation efficiently. This intermediary approach allows for streamlined data flow and optimized initialization sequences, improving the overall efficiency of the initial setting process compared to distributed NAND gate-based initialization.
Solution Approach 2:
The patent enables preliminary preparation of initial setting data outside the memory circuit, allowing the memory controller to receive and process initialization data before actual memory operations begin. This preliminary action approach optimizes the initialization sequence and improves efficiency by preparing data in advance through the data bus interface.
Data Source
AI summary
A memory storage apparatus including a memory circuit and a memory controller is provided. The memory circuit is configured to store data. The memory controller is coupled to the memory circuit via a data bus. The memory controller performs initial setting of the memory circuit on the basis of a width of the data bus. In addition, an operating method of a memory storage apparatus is also provided.