Memory Controller Channel Segmentation for Concurrent Die Access
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Solution Overview
Problem
Flash memory devices face challenges in achieving simultaneous busy status for multiple memory dies within the same channel due to limitations in memory controllers, leading to reduced data transmission efficiency as data throughput increases.
Innovation Solution
A memory controller with a command circuit and detect circuit that allows for instantaneous detection of operational status, interruption, and recovery of memory units within the same channel to assert operational commands efficiently, enabling quicker entry into busy status for multiple memory units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the memory controller makes multiple flash memory dies in the same channel enter busy status simultaneously, then data transmission efficiency is improved, but the memory controller limitation prevents this from being achieved
Solution Approach 1:
The patent segments the channel into multiple independent memory die groups, each capable of being accessed independently. The memory controller can assert commands to different memory dies within the same channel simultaneously by dividing the channel resources into separate accessible units, thereby improving data transmission efficiency despite controller limitations.
2Productivity
If the memory controller asserts commands to multiple memory dies concurrently, then throughput increases, but the controller can only make one memory die transmit data at any specific point in time
Solution Approach 1:
The patent introduces a new dimension of operation by enabling the memory controller to assert commands to multiple memory dies along the channel dimension simultaneously. While the controller can only transmit data through one die at a time, it can initiate operations on multiple dies in parallel by utilizing the channel structure as an additional operational dimension, thereby increasing overall throughput.
Data Source
AI summary
A control method includes detecting an operational command to a first memory unit, interrupting an operational status of a second memory unit, asserting the operational command corresponding to the first memory unit, and recovering the operational status of the second memory unit. The first memory unit and the second memory unit correspond to the same channel.