Memory Controller Check Read Operations for Storage Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The high degree of integration in semiconductor storage devices leads to reduced reliability due to data damage, and existing reliability check methods increase latency and decrease throughput.
Innovation Solution
A storage device with a nonvolatile memory device and a memory controller that performs a read operation followed by first and second check read operations on neighbor pages, using sets of read voltages, to reduce the time necessary for check read operations while maintaining reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reliability check methods are introduced to prevent data damage, then reliability is improved, but latency increases and throughput decreases
Solution Approach 1:
The patent performs check read operations on neighbor pages in advance before actual read operations are needed. By proactively verifying the status of adjacent memory cells and pages, the system prepares reliability information ahead of time, so that when a read operation is requested, the data can be retrieved immediately without performing verification at that moment, thus reducing latency while maintaining reliability
2Reliability
If check read operations are performed on all neighbor pages, then reliability is improved, but processing time increases
Solution Approach 1:
The patent applies different verification strategies to different regions of the memory device. Instead of uniformly checking all neighbor pages, it performs check read operations selectively on specific neighbor pages based on their proximity to the selected page and the actual need for verification. This localized approach ensures reliability for critical adjacent regions while avoiding unnecessary verification time for less critical areas
3Reliability
If multiple check read operations are performed sequentially, then reliability verification is improved, but throughput decreases
Solution Approach 1:
The patent implements periodic check read operations at strategically determined intervals rather than continuous verification. The memory controller monitors read patterns and performs check operations on neighbor pages periodically based on usage frequency and error rates. This periodic verification maintains reliability by catching errors at appropriate intervals while allowing normal read operations to proceed without interruption, thus preserving throughput
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A storage device includes a nonvolatile memory device and a memory controller allowing the nonvolatile memory device to perform a read operation on memory cells belonging to a selected page in a selected memory block. After the read operation, the memory controller allows the nonvolatile memory device to perform a first check read operation on memory cells of a first neighbor page while sequentially selecting sets of read voltages. After the first check read operation, the memory controller allows the nonvolatile memory device to perform a second check read operation on memory cells of a second neighbor page while sequentially selecting the sets of read voltages. In the second check read operation, the memory controller first selects a set of read voltages, which are used in the first check read operation in which error correction succeeds.