Memory Controller Chunk Programming for Disturbance Reduction
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Solution Overview
Problem
Memory devices experience disturbances between memory chunks, leading to reliability issues, especially in high-density memory devices with wear-out or broken blocks, which can result in incorrect data programming and reduced reliability.
Innovation Solution
A memory controller that determines the error rate of memory blocks and performs either one-shot programming or multi-level programming operations based on the error rate, applying specific voltages to individual memory chunks to minimize disturbances and ensure reliable data programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-level programming operations are performed to increase efficiency, then programming speed is improved, but disturbance between memory chunks increases leading to reliability degradation
Solution Approach 1:
The patent implements dynamic programming mode selection that adapts between multi-level programming and one-shot programming based on real-time error rate monitoring. The memory controller dynamically switches programming strategies: using efficient multi-level programming for low-error blocks while transitioning to reliable one-shot programming for high-error blocks, thereby optimizing both speed and reliability under different operating conditions
Solution Approach 2:
The patent changes the programming operation parameters based on the error rate of memory blocks. When error rate exceeds a threshold, the system transitions from multi-level programming (applying multiple voltage levels sequentially) to one-shot programming (applying a single high-voltage pulse), fundamentally altering the voltage application parameters to eliminate disturbance-induced reliability issues
2Reliability
If one-shot programming operations are performed to avoid disturbance, then reliability is improved, but programming efficiency decreases
Solution Approach 1:
The patent applies different programming qualities to different memory blocks based on their individual error characteristics. Instead of uniformly applying one-shot programming to all blocks (which would reduce overall efficiency), the system identifies specific high-error blocks and applies one-shot programming only to those blocks, while maintaining efficient multi-level programming for low-error blocks, thereby achieving local optimization of reliability without sacrificing global productivity
3Quantity of substance
If multi-level programming is used for high-density memory devices, then storage capacity is increased, but disturbance between memory chunks occurs especially in wear-out blocks
Solution Approach 1:
The patent implements a feedback mechanism where the memory controller continuously monitors error rates in memory blocks and uses this feedback to determine the appropriate programming operation. The error rate information feeds back to the control logic, which then selects between multi-level and one-shot programming modes, creating a closed-loop system that adapts to the actual state of the high-density memory device and mitigates disturbance in wear-out blocks
Data Source
AI summary
A memory device includes a memory cell array and a memory controller. The memory cell array includes a plurality of memory blocks. Each of the memory blocks includes a plurality of word lines. A plurality of memory chunks is coupled to at least one of the word lines. The memory controller is configured to program data to a particular memory chunk of the plurality of memory chunks by performing a chunk operation that includes selecting a particular word line from the plurality of word lines, selecting a particular memory chunk from the plurality of memory chunks that are coupled to the particular word line, and applying a program voltage to a particular memory block corresponding to the particular memory chunk to program data to the particular memory chunk.