Memory Controller Data Clock Calibration via Phase Difference Adjustment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory systems require significant firmware intervention for data clock calibration, which can be complex and burdensome, and the calibration process is prone to errors due to distorted phase differences in data clocks and pattern data.
Innovation Solution
A memory system that includes a controller and a memory device capable of performing data clock calibration by generating and comparing pattern data with predetermined phase differences, minimizing firmware intervention and calibrating phase differences within the controller to ensure accurate data detection and transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If firmware intervention is used for data clock calibration, then calibration can be performed, but the complexity and burden of firmware increases
Solution Approach 1:
The memory device performs self-calibration by autonomously generating pattern data, detecting it using the data clock signal, comparing detected values with expected values, and adjusting phase differences without external firmware intervention. This transfers the calibration burden from firmware to the memory device itself, reducing firmware complexity while maintaining calibration accuracy.
Solution Approach 2:
The calibration process is segmented into distinct functional units within the memory device: a generation unit for creating pattern data, a detection unit for reading pattern data with data clock, a comparison unit for comparing detected vs. expected values, and a calibration unit for adjusting phase differences. This modular segmentation enables autonomous operation while reducing firmware burden.
2Measurement precision
If phase difference calibration is performed in firmware, then calibration can be achieved, but errors occur due to distorted phase differences
Solution Approach 1:
The memory device performs preliminary calibration actions by pre-generating pattern data with known expected values and pre-comparing these with actually detected values before normal operation. This preliminary comparison of expected versus actual detected values allows the system to identify and correct phase distortion issues before they affect data integrity, improving both measurement precision and calibration reliability.
Solution Approach 2:
The comparison unit provides feedback by comparing detected pattern data values with expected values, and the calibration unit uses this feedback to iteratively adjust phase differences. This closed-loop feedback mechanism ensures that phase distortion is continuously corrected, improving both measurement precision and calibration reliability by verifying calibration effectiveness.
Data Source
AI summary
A memory system may include: a controller suitable for: generating a first clock and first pattern data having a first phase difference, in a write calibration mode, calibrating, the first phase difference depending on a second information, in a read calibration mode, detecting, a first and second value of the first and second pattern data according to the first and second clock, generating, a first information according to comparing of the first and second values, receiving by calibrating, a second phase difference generated by a memory device depending on the first information; and the memory device suitable for: generating the second clock and the second pattern data having the second phase difference, in the write calibration mode, detecting, a first and second value of the first and second pattern data according to the first and second clock, generating, the second information according to comparing of the first and second values.