Memory Controller Command Dependency Analysis

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Solution Overview

Problem

Memory systems face complexity and performance deterioration due to the lack of efficient management of command dependencies and priorities, leading to suboptimal data processing in portable electronic devices.

Innovation Solution

A memory system with a controller that identifies dependencies and priority orders between commands using engines like CRC and hash code, and controls memory dies to perform operations sequentially based on these determinations, ensuring that lower-priority commands are held until higher-priority operations are completed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the controller processes multiple commands simultaneously without checking dependencies and priorities, then the productivity is improved, but the reliability deteriorates due to incorrect command execution order

Engineering Contradiction:
Improvecommand processing speedVSAvoidcommand execution correctness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The controller performs preliminary analysis of command dependencies and priorities before executing commands. The dependency check engine analyzes command addresses to determine execution order requirements in advance, and the controller holds lower-priority commands until higher-priority commands are completed, ensuring correct execution order while maintaining high productivity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a dependency check engine as an intermediary component between command reception and execution. This engine checks command addresses, determines dependencies and priorities, and controls the execution sequence, thereby ensuring reliable command processing without significantly impacting processing speed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the controller checks dependencies and priorities between all commands, then the reliability is improved, but the device complexity increases

Engineering Contradiction:
Improvecommand execution correctnessVSAvoidcontroller structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the dependency checking function as a separate, dedicated engine within the controller. This modular approach isolates the complexity of dependency analysis from the main command execution logic, making the overall system more manageable and easier to implement while maintaining high reliability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The dependency check engine uses the command addresses themselves as the basis for determining dependencies and priorities. By performing XOR operations on addresses and comparing results with stored bitmap values, the engine self-determines execution order without requiring external control logic or additional complex structures

Inventive Principle:
Principle #25Self-service

3Reliability

If the controller holds lower-priority commands until higher-priority commands are completed, then the reliability is improved, but the loss of time increases for lower-priority operations

Engineering Contradiction:
Improvecommand execution correctnessVSAvoidcommand execution delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The controller dynamically adjusts command execution based on real-time dependency analysis. By continuously monitoring command priorities and execution status, the controller optimizes the holding of lower-priority commands, ensuring they are executed as soon as possible after higher-priority commands complete, thereby minimizing time loss while maintaining execution correctness

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10579264B2Memory system and operating method thereof
Publication Date: 2020.03.03 MIMIRIP LLC
  • US10579264B2 patent drawing
  • US10579264B2 patent drawing
  • US10579264B2 patent drawing

AI summary

A memory system may include: a plurality of memory dies; and a controller suitable for identifying a dependency between first and second commands and a priority order of the first and the second commands through a check engine, and control the memory dies to sequentially perform first and second command operations in response to the first and second commands according to the dependency and the priority order.