Memory Controller Access Command Encryption

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Solution Overview

Problem

Conventional computers and electronic devices lack effective data security measures, making them vulnerable to unauthorized access and data tampering as network devices become increasingly interconnected.

Innovation Solution

A memory controller is introduced between a host controller and a memory module, equipped with a central buffer that processes data access commands using predefined encryption and decryption algorithms, ensuring secure data exchange by encrypting access commands and data, thereby protecting against unauthorized access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a memory controller with encryption is introduced between the host controller and memory module, then data security is improved, but device complexity increases

Engineering Contradiction:
Improvedata securityVSAvoidsystem structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A memory controller is introduced as an intermediary device between the host controller and memory module. The memory controller includes a central buffer with encryption/decryption modules that intercept and process commands and data, encrypting them before transmission to the memory module and decrypting them when reading. This intermediary structure enables security functionality without requiring modifications to the existing host controller or memory module interfaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If encryption algorithms are implemented in the central buffer, then data security is improved, but processing speed deteriorates

Engineering Contradiction:
Improvedata securityVSAvoiddata processing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The encryption algorithm is pre-configured and stored in the central buffer's encryption/decryption module during system initialization or manufacturing. This preliminary preparation allows the encryption process to be executed efficiently during runtime without requiring complex real-time algorithm configuration, thereby minimizing the impact on data processing speed while maintaining security.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If access commands are encrypted, then unauthorized access is prevented, but command processing complexity increases

Engineering Contradiction:
Improveaccess control securityVSAvoidcommand processing
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The central buffer acts as an intermediary command processing unit that receives encrypted access commands from the host controller, decrypts them using pre-configured algorithms, and then processes the decrypted commands to access the memory module. This intermediary approach concentrates the processing complexity in a dedicated module rather than distributing it throughout the entire system, making the complexity manageable and localized.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10936212B2Memory controller, method for performing access control to memory module
Publication Date: 2021.03.02 MONTAGE TECHNOLOGY CO LTD
  • US10936212B2 patent drawing
  • US10936212B2 patent drawing
  • US10936212B2 patent drawing

AI summary

The application discloses a memory controller and a method for controlling an access to a memory module. The memory controller is coupled between the memory module and a host controller to control the access of the host controller to the memory module. The memory controller comprises: a central buffer coupled to the host controller for receiving data access command from the host controller and coupled to the memory module for providing an encrypted data access command to the memory module; wherein the central buffer comprises a command processing module, for performing encryption operation to a data access command with a predefined command encryption algorithm to generate an encrypted data access command; wherein a data channel is coupled between the memory module and the host controller, and wherein under the control of the encrypted data access command, the memory module exchanges data with the host controller via the data channel.