Memory Controller Compensation Circuit for Flash Power Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of flash memory devices leads to unstable power supply due to exceeding the allowable power of the host's power supply, limiting the performance of the flash memory system, especially during peak operations like simultaneous read, write, or erase operations.
Innovation Solution
A memory controller with a compensation unit that includes a resistor unit, a charging unit, and a comparison unit to supply additional power to flash memory devices when the required power exceeds a predetermined threshold, stabilizing the power supply and reducing peak power burdens on the voltage regulator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple flash memory devices are used to improve capacity and operating speed, then the storage capacity and performance of the flash memory system increase, but the power consumption exceeds the allowable power of the host power supply, causing unstable power supply
Solution Approach 1:
The compensation unit charges energy storage elements (capacitors) in advance during low-power periods. When peak power is needed during simultaneous read/write/erase operations, the pre-charged energy storage elements immediately supply additional power, avoiding the need for the host power supply to continuously provide excessive power.
Solution Approach 2:
The compensation unit acts as an intermediary power supply between the host power supply and the flash memory devices. It includes energy storage elements that buffer power fluctuations, absorbing excess power when available and releasing it during peak demand, thereby stabilizing the power supply to the flash memory devices.
2Productivity
If the host power supply provides excessive power to meet peak demands, then the flash memory devices can operate at full performance, but the power supply becomes unstable and noisy
Solution Approach 1:
The compensation unit serves as a power buffer that isolates the flash memory devices from power supply instability. The energy storage elements (capacitors C1, C2) in the compensation unit filter power fluctuations and provide clean, stable power during peak operations, preventing noise and instability from the host power supply from affecting device operation.
Solution Approach 2:
The compensation unit prepares energy storage elements in advance to cushion against power supply instability. By pre-charging capacitors during normal operation, the system creates a power buffer that absorbs sudden power demands and smooths out fluctuations, preventing instability before it occurs during peak operations.
3Productivity
If the voltage regulator supplies power to multiple flash memory devices simultaneously, then the system can perform parallel operations, but the peak power burden on the voltage regulator increases beyond its capacity
Solution Approach 1:
The compensation unit pre-charges local energy storage elements (capacitors connected to each flash memory device) before peak operations occur. During simultaneous read/write/erase operations, these pre-charged capacitors immediately supply power locally, reducing the peak power burden on the voltage regulator and enabling parallel operations without overloading the power supply.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves the reliability and performance of the flash memory system by ensuring stable power supply during peak operations, preventing noise and limitations in device operations, and enhancing overall system stability.
Implementation Method 1
the charging unit may be an energy storage medium connected between the input terminals of the plurality of flash memory devices and a terminal ground
Data Source
AI summary
A user system is provided including a plurality of flash memory devices and a memory controller connected to the flash memory devices through a plurality of channels. The memory controller includes a voltage regulator configured to supply a power of the flash memory devices and a compensation unit configured to supply an additional power to the flash memory devices when a power required by the flash memory devices exceeds a predetermined level. The compensation unit includes a resistor unit connected to an output terminal of the voltage regulator and input terminals of the flash memory devices and a charging unit connected to input terminals of the flash memory devices. The charging unit is configured to supply an additional power to the flash memory devices according to voltages of input terminals of the flash memory devices.


