Memory Device Controller Compression for Internal Interface Bottlenecks
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Solution Overview
Problem
Storage systems with multiple memory devices face challenges in optimizing internal data transmission speeds, particularly during periods of heavy traffic, where existing solutions either lose clock cycles or fail to efficiently manage data alignment and compression.
Innovation Solution
Implementing data compression by device controllers prior to transfer over internal communication interfaces, using lossless algorithms like Lempel-Ziv or LZ4, and omitting padded bits to align data, thereby reducing traffic and enhancing transmission speed without increasing clock speed or capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is transferred uncompressed over internal communication interfaces, then data transmission capacity is maintained, but transmission speed decreases during heavy traffic periods
Solution Approach 1:
The device controller dynamically changes the data format parameter by applying compression algorithms (such as Lempel-Ziv or LZ4) to transform uncompressed data into compressed data before transmission over the internal communication interface, thereby reducing traffic volume and increasing effective transmission speed without modifying the physical interface characteristics
2Productivity
If compression algorithms are applied to data, then traffic reduction is achieved, but processing complexity increases
Solution Approach 1:
The device controller performs self-service by implementing compression and decompression functionality internally, eliminating the need for external compression hardware or complex host processor intervention, thereby achieving traffic reduction with controlled processing complexity within the controller itself
3Manufacturing precision
If padded bits are included in data transfers, then data alignment is maintained, but interface traffic increases
Solution Approach 1:
The invention extracts and removes padded bits from the data transfer stream by implementing alignment tracking at the controller level, transmitting only the essential data bytes without the alignment padding, and maintaining alignment precision through software-based boundary tracking rather than physical padding transmission
Data Source
AI summary
Apparatus and methods are disclosed, including enabling communication between a memory controller and multiple memory devices of a storage system using a storage-system interface, the multiple memory devices each comprising a device controller and a group of non-volatile memory cells, and compressing data using at least one of the device controllers prior to transfer over the storage-system interface to improve an effective internal data transmission speed of the storage system.


