Memory Controller Data Compression and Padding for Wear Balancing
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Solution Overview
Problem
Flash memory durability degrades as the amount of electric charge injected into memory cells increases, leading to wear and reduced performance, especially in multi-level cell modes where the distribution with the maximum threshold voltage experiences the highest wear, limiting independent read and write operations on upper and lower pages.
Innovation Solution
A memory controller with a compression unit and padding processing unit that compresses data and adds padding data to minimize the number of cells with maximum threshold voltage distributions, distributing compression and padding data across upper and lower pages to balance wear and enable independent page operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is written to flash memory cells, then storage capacity is utilized, but durability degrades due to increased electric charge injection
Solution Approach 1:
The patent applies local quality by distributing data writing to different threshold voltage distributions across multiple pages. Instead of concentrating writes in a single distribution, the system divides data across pages with different threshold voltage characteristics, thereby localizing wear to specific regions and preserving overall memory durability while maintaining storage capacity utilization.
2Productivity
If compression is applied to data pages, then storage efficiency improves, but the distribution of threshold voltages becomes unbalanced causing wear concentration
Solution Approach 1:
The patent segments compressed data across multiple pages with different threshold voltage distributions. By dividing the compressed data stream and distributing it to different pages (e.g., upper page, lower page, extra page), the system maintains storage efficiency through compression while preventing wear concentration by spreading the electrical stress across multiple threshold voltage distributions.
Solution Approach 2:
The patent changes the parameter of data distribution by allocating compressed data to pages with different threshold voltage characteristics. This parameter change ensures that no single threshold voltage distribution bears excessive wear, thereby maintaining reliability while preserving the storage efficiency benefits of compression.
3Reliability
If padding data is added to balance wear distribution, then durability improves, but the number of cells with maximum threshold voltage increases
Solution Approach 1:
The patent inverts the conventional approach by not adding padding data to fill spaces, but rather strategically distributing compressed data to pages where it naturally balances wear. Instead of using padding to achieve balance (which increases maximum threshold voltage cells), the system redistributes actual data across pages to achieve wear balance without increasing the number of maximum threshold voltage cells.
4Ease of operation
If independent read and write operations are enabled on upper and lower pages, then operational flexibility improves, but wear concentration on maximum threshold voltage distribution occurs
Solution Approach 1:
The patent enables universal wear balancing across multiple page types (upper page, lower page, extra page) that can independently handle read and write operations. Each page type serves multiple functions: storing data, balancing wear, and supporting independent operations. This multi-functionality allows operational flexibility while preventing wear concentration through distributed writing across all page types.
Data Source
AI summary
According to one embodiment, a memory controller includes a compression unit and a padding processing unit. The compression unit compresses first data to be written into a first page and second data to be written into a second page. The padding processing unit performs a padding processing such that the compressed first data is written into first memory cells, first padding data is written into second memory cells, the compressed second data is written into third memory cells, and second padding data is written into fourth memory cells.


