Memory Controller Compression Table Segmentation
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Solution Overview
Problem
In memory systems like SSDs with NAND flash memory, data compression and decompression lead to increased size of the logical/physical conversion table, which can result in a decrease in cache hit rate and I/O performance due to limited cache area capacity, especially under cost constraints.
Innovation Solution
The memory system includes a controller that manages a table for address conversion, compresses data, determines allocation based on data size, and stores offset information and size in a header area of the physical cluster, reducing the size of the logical/physical conversion table and improving cache hit rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data compression function is added to the memory system, then data storage efficiency is improved, but the size of the logical/physical conversion table increases
Solution Approach 1:
The patent segments the conversion information into two parts: (1) conversion from logical address to physical cluster address stored in the logical/physical conversion table, and (2) conversion from physical cluster address to physical address stored in the cluster management table. This segmentation allows the main conversion table to remain compact while compression-specific information is handled separately in the cluster management table.
Solution Approach 2:
The patent introduces a cluster management table as an intermediary data structure that handles the complexity of compressed data management. This intermediary table stores compression-specific information (compression status, physical addresses, sizes) separately, allowing the main logical/physical conversion table to remain simple and cache-friendly while still supporting compression functionality.
2Reliability
If the capacity of the cache area is increased to accommodate the larger conversion table, then the cache hit rate is improved, but the cost increases
Solution Approach 1:
By segmenting the conversion functionality into two tables with different purposes, the patent enables the main logical/physical conversion table to remain small and cacheable, while the cluster management table handles the bulk of compression-related data. This segmentation allows maintaining high cache hit rates without proportionally increasing cache capacity costs.
Solution Approach 2:
The patent applies different data structures and storage strategies to different parts of the address conversion system. The logical/physical conversion table uses a compact format optimized for caching, while the cluster management table uses a more detailed format optimized for compression management. This local optimization allows each part to be efficient in its specific context without requiring uniform increases in resources across the entire system.
3Adaptability or versatility
If the size of the logical/physical conversion table increases, then the data allocation flexibility is improved, but the I/O performance decreases
Solution Approach 1:
The patent segments address conversion into two stages: logical-to-physical-cluster conversion (in the conversion table) and physical-cluster-to-physical-address conversion (in the cluster management table). This segmentation maintains data allocation flexibility through the detailed cluster management table while keeping the critical logical-to-physical conversion path fast through the compact conversion table.
Solution Approach 2:
The patent performs preliminary organization of compressed data information in the cluster management table before actual I/O operations. By pre-organizing compression status, physical addresses, and sizes in this table, the system prepares conversion information in advance, allowing the main conversion table to remain small while still supporting flexible data allocation when needed.
Data Source
AI summary
According to one embodiment, a controller of a memory system manages a first table maintaining a relationship between a logical address and a physical address, compresses first data corresponding to a first address of a write command, specifies a size of second data obtained by compressing the first data, determines allocation of the second data on a memory based on the size of the second data, stores a second address corresponding to a physical area where a head of the second data is stored and a physical area number used to store the second data in an entry of the first logical address in the first table, and stores the first address, offset of a position of a leader of the second data in the physical area, and the size of the second data in the physical area.