Memory Controller Corrected Error Risk Assessment PPR
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Solution Overview
Problem
Existing electronic devices face challenges in preventing uncorrected errors when data is read from memory modules, leading to potential data loss and reduced reliability, availability, and serviceability.
Innovation Solution
An electronic device with a processor that detects corrected errors, determines their risk level, and schedules a post-package repair (PPR) for addresses with high-risk errors, using dynamic random access memory and error logs to manage and mitigate uncorrected errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the processor performs read operations on the memory module without error detection and correction mechanisms, then the device complexity is reduced, but uncorrected errors occur causing data loss and reduced reliability
Solution Approach 1:
The system performs preliminary error detection by checking for corrected errors during read operations and proactively schedules PPR before uncorrected errors occur. The error log is maintained in advance to track error patterns, enabling preventive action rather than reactive correction.
Solution Approach 2:
The system implements feedback by continuously monitoring error logs and using the corrected error information to determine risk levels. This feedback loop enables the system to adaptively schedule PPR operations based on actual error patterns observed during normal operation.
2Reliability
If the processor implements comprehensive error detection and correction for all memory addresses, then reliability is improved, but the processing time and productivity are reduced due to extensive error checking
Solution Approach 1:
Instead of applying error correction uniformly to all memory addresses, the system applies PPR selectively only to addresses that exhibit high-risk error patterns in the error log. This localized approach concentrates resources on problematic areas while leaving stable memory regions unaffected.
Solution Approach 2:
The system performs partial error correction by addressing only the subset of memory addresses that require PPR based on risk level assessment, rather than performing exhaustive correction on all addresses. This partial action maintains productivity while achieving sufficient reliability.
3Reliability
If the processor schedules PPR for all corrected errors regardless of risk level, then reliability is maximized, but the loss of time due to unnecessary PPR operations increases
Solution Approach 1:
The system changes the parameter of PPR scheduling from a binary decision (schedule or not) to a risk-level-based decision. By introducing risk level as a parameter with different thresholds, the system optimizes the balance between reliability and time loss by scheduling PPR only when necessary.
Solution Approach 2:
The error log is maintained in advance to capture error patterns before PPR is scheduled. This preliminary error tracking allows the system to identify high-risk addresses proactively, enabling timely PPR scheduling without unnecessary delays for low-risk addresses.
4Reliability
If the processor does not maintain error logs for corrected errors, then device complexity is reduced, but the ability to determine risk level and schedule PPR appropriately is lost
Solution Approach 1:
The error log system operates autonomously, automatically recording corrected errors and maintaining error patterns without requiring external intervention. The processor itself services the error logging function, eliminating the need for separate complex error management infrastructure.
Data Source
AI summary
Disclosed is an electronic device including a memory module that includes at least one dynamic random access memory, and a processor configured to access the memory module, determine a corrected error count associated with an address of a corrected error in response to the corrected error being detected when data are read from the memory module, read an error log associated with the corrected error, determine a risk level of the corrected error based on the error log, and schedule a post package repair (PPR) for the address of the corrected error in response to the risk level of the corrected error being high.


