Memory Controller Dynamic Correction Information Allocation
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Solution Overview
Problem
Memory systems require significant memory resources for decoding error-correction codes, leading to increased memory access and decreased decoding speed due to the storage of external values, which hampers performance.
Innovation Solution
The memory system optimizes memory usage by dynamically determining the number of correction information pieces and low-reliability location information based on the number of component codes, allowing for efficient allocation and reducing the total memory capacity required for decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory system stores external values for all component codes to ensure decoding reliability, then decoding reliability is improved, but memory capacity requirement increases and decoding speed decreases
Solution Approach 1:
The patent applies local quality by differentiating the storage requirements for correction information based on the reliability of each component code. Instead of uniformly storing external values for all component codes, the system identifies and stores external values only for low-reliability component codes (those with higher error rates), thereby reducing overall memory capacity requirements while maintaining decoding reliability for the most critical codes.
Solution Approach 2:
The patent implements dynamics by dynamically determining which component codes require external value storage based on their actual reliability characteristics. The system adapts its memory allocation strategy in real-time during decoding operations, adjusting which component codes receive external value storage based on observed error patterns, thus optimizing the balance between reliability and speed.
2Measurement precision
If the memory system stores external values for all component codes to ensure decoding accuracy, then decoding accuracy is improved, but memory access operations increase leading to decreased performance
Solution Approach 1:
The patent applies local quality by selectively storing external values only for low-reliability component codes rather than uniformly for all codes. This localized approach ensures that memory access operations are concentrated only where necessary (for codes with higher error rates), reducing overall memory access time while maintaining decoding accuracy for the most critical component codes.
Solution Approach 2:
The patent extracts the essential function of external value storage from all component codes and applies it only to the subset of low-reliability codes that actually require it. By removing the unnecessary external value storage operations for high-reliability codes, the system reduces memory access overhead while preserving decoding accuracy where it matters most.
3Device complexity
If the memory system uses a fixed memory allocation strategy for correction information, then device complexity is reduced, but memory capacity cannot be optimized for varying numbers of component codes
Solution Approach 1:
The patent implements dynamics by replacing fixed memory allocation strategies with a dynamic determination mechanism. The system calculates the number of correction information pieces and low-reliability location information based on the actual number of component codes being decoded, allowing the memory allocation to adapt automatically to varying code configurations without increasing operational complexity.
Solution Approach 2:
The patent applies parameter changes by adjusting memory allocation parameters (number of correction information pieces, storage locations) based on the number of component codes. The system modifies these parameters dynamically according to the decoding task requirements, enabling optimized memory capacity for different component code counts while maintaining simple memory management through standardized allocation rules.
Data Source
AI summary
A memory controller determines the number of pieces of correction information of an a-th correction information for each of M component codes according to a value based on the number of component codes, and determines a correction information address which is an address on a correction information memory of the a-th correction information based on the number of pieces of correction information. The memory controller calculates an a-th soft-input value for an a-th component code, inputting the a-th soft-input value to execute decoding processing of the a-th component code, calculates a decoded word of the a-th component code, a-th correction information, and a-th reliability information, stores the a-th correction information and b-th correction information indicating a b-th corrected location (1≤b≤nj) in a j-th dimension (j≠i, 1≤j≤N) in the correction information address of the correction information memory, stores a-th reliability information in a reliability information memory, and outputs an output decoded word calculated from the read information and the reliability information of each component code.