Memory Controller Sequential Data Migration

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Solution Overview

Problem

Existing memory controllers do not efficiently manage the reading of valid data with successive logical addresses, leading to suboptimal performance in data retrieval operations.

Innovation Solution

A memory controller that includes a meta data memory for storing mapping information and valid data information, and a migration controller to move valid data from a source memory block to a target memory block, allowing sequential data with successive logical addresses to be stored and read simultaneously in the target block, thereby improving read speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If valid data with successive logical addresses is stored in scattered memory blocks, then data can be stored flexibly, but read speed deteriorates

Engineering Contradiction:
Improveread speedVSAvoiddata management complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments data into two categories: sequential data (with successive logical addresses) and random data (without successive addresses). This segmentation allows the system to apply different management strategies to each type, optimizing read operations for sequential data by consolidating it in specific memory blocks while maintaining flexible storage for random data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The migration controller performs preliminary actions by identifying sequential data and proactively migrating it to appropriate memory blocks before read operations occur. This advance organization ensures that sequential data is already consolidated and ready for high-speed reading when needed, eliminating the need for real-time data reorganization during read operations.

Inventive Principle:
Principle #10Preliminary action

2Speed

If data is migrated frequently to optimize read performance, then read speed improves, but energy consumption increases

Engineering Contradiction:
Improveread speedVSAvoidenergy consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by treating sequential data and random data differently. Sequential data is selectively migrated and consolidated in specific memory blocks optimized for sequential access, while random data remains in its original locations. This localized optimization approach improves read speed for sequential operations without unnecessarily migrating all data, thereby reducing overall energy consumption.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes the organizational parameter of sequential data from scattered distribution to consolidated storage in specific memory blocks. This parameter change optimizes the physical layout of sequential data to match its access pattern, enabling faster reading while avoiding changes to random data that would consume additional energy.

Inventive Principle:
Principle #35Parameter changes

3Speed

If sequential data is consolidated in specific memory blocks, then read speed improves, but write operation complexity increases

Engineering Contradiction:
Improveread speedVSAvoidwrite operation complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The migration controller acts as an intermediary between the host and memory device, automatically managing the consolidation of sequential data. It monitors incoming write operations, identifies sequential data patterns, and handles the migration to appropriate memory blocks without requiring changes to the host interface or basic write operations. This intermediary approach maintains simple write operations from the host perspective while achieving optimized storage organization.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11494106B2Memory controller and method of ordering sequential data and random data
Publication Date: 2022.11.08 MIMIRIP LLC
  • US11494106B2 patent drawing
  • US11494106B2 patent drawing
  • US11494106B2 patent drawing

AI summary

A memory controller includes a meta data memory configured to store mapping information of data stored in a plurality of memory blocks included in a memory device and valid data information indicating whether the data stored in the plurality of memory blocks is valid data, and a migration controller configured to control the memory device to perform a migration operation of moving a plurality of valid data stored in a source memory block among the plurality of memory blocks from the source memory block to a target memory block based on the mapping information and the valid data information.