Memory Controller Data Pattern Control for NAND Flash Reliability

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Solution Overview

Problem

The increasing integration density in non-volatile memory devices, such as NAND flash memory, leads to proximity issues between memory cells, causing data degradation due to coupling effects like electric field coupling, which adversely affect data reliability.

Innovation Solution

A method and system involving a memory controller that generates a coset representative sequence, performs XOR operations, calculates branch metrics, and determines survivor paths to control data programming patterns, thereby minimizing undesirable coupling effects and enhancing data reliability by defining appropriate programmed states for memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If integration density is increased to improve storage capacity, then productivity is improved, but coupling effects between adjacent memory cells worsen data reliability

Engineering Contradiction:
Improvestorage capacityVSAvoiddata reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-defining favorable and unfavorable programmed states before data programming occurs. The memory controller identifies unfavorable state patterns (e.g., adjacent cells both in erased state or both in highest programmed state) and proactively adjusts programming to avoid these patterns, thereby preventing coupling effects before they degrade data reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter distribution of programmed states by constraining certain bit lines from transitioning to unfavorable states (erased or highest programmed state). This parameter control modifies the threshold voltage distribution to widen separation between states, reducing overlap and improving reliability despite high integration density.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If data programming pattern is not properly defined, then ease of operation is improved, but coupling effects worsen and cause data degradation

Engineering Contradiction:
Improveprogramming simplicityVSAvoiddata reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The memory controller performs self-service by automatically analyzing incoming data patterns and adjusting programmed states to avoid unfavorable configurations. The system autonomously identifies patterns that would cause coupling effects and modifies the programming operation without requiring external intervention, thereby maintaining both ease of operation and data reliability.

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If threshold voltage distribution is narrowed, then manufacturing precision is improved, but coupling effects worsen and reduce data reliability

Engineering Contradiction:
Improvethreshold voltage controlVSAvoiddata reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies local quality by treating different bit lines differently based on their programmed states. Certain bit lines are constrained from transitioning to unfavorable states (erased or highest programmed state) while others are allowed greater flexibility. This localized control creates favorable threshold voltage distributions that widen separation between states, improving reliability without sacrificing manufacturing precision.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9460782B2Method of operating memory controller and devices including memory controller
Publication Date: 2016.10.04 SAMSUNG ELECTRONICS CO LTD
  • US9460782B2 patent drawing
  • US9460782B2 patent drawing
  • US9460782B2 patent drawing

AI summary

A method of operating a memory controller includes receiving a first data sequence and generating a coset representative sequence that can be divided into m-bit strings, where “m” is a natural number of at least 2; performing a first XOR operation on each of the m-bit strings in the coset representative sequence and binary bits; calculating all possible branch metrics according to a result of the first XOR operation; determining a survivor path sequence based on the all possible branch metrics; and performing a second XOR operation on the coset representative sequence and the survivor path sequence and generating an output sequence.