Memory Controller Data Stream Dispatching for Smart Card Integration

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Solution Overview

Problem

The industry faces challenges in identifying and transmitting data streams between a host system and a memory storage apparatus that combines a non-volatile memory and a smart card chip, particularly in determining whether a read command corresponds to specific logical block addresses and efficiently handling response data units.

Innovation Solution

A data stream dispatching method and memory controller configuration that configures logical block addresses for the non-volatile memory, stores response data units in a buffer memory, and aligns access units for transmission, ensuring correct and efficient data transfer between the host system and the smart card chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a memory storage apparatus combines non-volatile memory and smart card chip to increase storage capacity and functionality, then the storage capacity and security functions are improved, but the complexity of identifying and transmitting data streams between host system and smart card chip increases

Engineering Contradiction:
Improvestorage capacity and security functionsVSAvoiddata stream identification and transmission complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The data stream is segmented into distinct command data units and response data units with unique identification markers. Command data units are marked with a first identification marker while response data units are marked with a second identification marker, allowing the host system to easily differentiate and process the two types of data streams without complex identification logic

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory controller acts as an intermediary between the host system and the smart card chip. It receives data streams from the host system, identifies whether they are command or response data units using the identification markers, and routes them appropriately to the smart card chip or back to the host system, thereby simplifying the overall data stream management

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If response data units are transmitted directly from smart card chip to host system without buffering, then the transmission speed is improved, but the accuracy of data transmission and alignment is compromised

Engineering Contradiction:
Improveresponse data unit transmission speedVSAvoiddata transmission accuracy and alignment
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The memory controller performs preliminary actions by receiving and buffering response data units from the smart card chip before they are transmitted to the host system. This buffering allows the memory controller to align the response data units with the command data units and ensure proper data transmission accuracy without significantly delaying the overall transmission speed

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If data streams are transmitted without alignment to access units, then the transmission flexibility is improved, but the data access efficiency and correctness is reduced

Engineering Contradiction:
Improvedata stream transmission flexibilityVSAvoiddata access efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system changes the parameter of data alignment by aligning both command data units and response data units to access unit boundaries during transmission. This alignment ensures that data is transmitted in properly formatted units that the host system can efficiently process, thereby improving data access efficiency while maintaining transmission flexibility through the identification marker system

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8595420B2Method for dispatching and transmitting data streams between host system and memory storage apparatus having non-volatile memory and smart card chip, memory controller, and memory storage apparatus
Publication Date: 2013.11.26 PHISON ELECTRONICS
  • US8595420B2 patent drawing
  • US8595420B2 patent drawing
  • US8595420B2 patent drawing

AI summary

A data stream dispatching method for a memory storage apparatus having a non-volatile memory module and a smart card chip is provided. The method includes configuring a plurality of logical block addresses for the non-volatile memory module, wherein a plurality of specific logical block addresses is used for storing a specific file. The method also includes receiving a response data unit from the smart card chip and storing the response data unit into a buffer memory. The method further includes when a logical block address corresponding to a read command issued by a host system is one of the specific logical block addresses and the response data unit is stored in the buffer memory, transmitting the response data unit to the host system by aligning an access unit. Thereby, the host system can correctly receive the response data unit from the smart card chip.