Memory Controller DBI Signaling Through EDC Code Space
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Solution Overview
Problem
Conventional Data Bus Inversion (DBI) techniques require an additional control pin for memory devices with narrow interfaces, making DBI encoding impractical for devices with fewer than four data links, as the extra pin is burdensome and often not utilized.
Innovation Solution
Utilizing a portion of the code-space provided by an error detection correction (EDC) code to indicate whether read data is DBI-encoded, eliminating the need for a dedicated DBI control pin by incorporating DBI circuitry within the memory controller's write and read circuitry to conditionally invert data bits based on threshold criteria.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate control pin is used for DBI encoding, then DBI control signal can be transmitted, but pin count increases making it burdensome for narrow interfaces
Solution Approach 1:
The patent merges the DBI control signal with the existing EDC code by utilizing unused code combinations (such as 0000 and 1111) in the EDC structure. This allows the DBI indication to be conveyed through the same data path as error correction codes, eliminating the need for a separate control pin while maintaining both functions.
Solution Approach 2:
The EDC code is given dual functionality: it continues to provide error detection and correction while simultaneously encoding DBI control information. By making the EDC structure serve multiple purposes, the patent eliminates the dedicated DBI pin requirement while preserving both error correction and DBI control capabilities.
2Ease of manufacture
If DBI encoding is implemented with additional control pin, then power delivery network is simplified, but narrow memory devices cannot utilize DBI due to pin constraints
Solution Approach 1:
The patent combines DBI control functionality with the existing EDC infrastructure, allowing narrow memory devices to implement DBI encoding without requiring additional pins. This merger enables power delivery network simplification benefits to extend to narrow interfaces that previously could not support DBI.
Solution Approach 2:
The system uses its own existing EDC code structure to carry DBI control information, making the DBI functionality self-contained within the data path. This self-service approach allows DBI to be implemented in narrow devices using only the existing data pins without external control signals.
3Device complexity
If EDC code-space is used for DBI indication, then dedicated DBI control pin is eliminated, but EDC code combinations are constrained
Solution Approach 1:
The patent extracts specific code combinations (such as 0000 and 1111) from the EDC code-space to represent DBI control states. By designating particular unused or redundant code patterns for DBI indication, the system eliminates the need for external control pins while preserving the EDC functionality for error correction.
Data Source
AI summary
Memory controllers, devices and associated methods are disclosed. In one embodiment, a memory controller includes write circuitry to transmit write data to a memory device, the write circuitry includes a write error detection correction (EDC) encoder to generate first error information associated with the write data. Data bus inversion (DBI) circuitry conditionally inverts data bits associated with each of the write data words based on threshold criteria. Read circuitry receives read data from the memory device. The read circuitry includes a read EDC encoder to generate second error information associated with the received read data. Logic evaluates the first and second error information and conditionally reverse-inverts at least a portion of the read data based on the decoding.