Memory Controller DFE Test Method for Data Transition Frequency
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Solution Overview
Problem
Existing decision feedback equalization (DFE) settings for memory devices may not be suitable for various data transition frequencies, leading to inefficiencies in compensating inter symbol interference (ISI) during writing operations.
Innovation Solution
A test method is provided that involves using a memory controller to write and read test data patterns with different data transition frequencies, allowing the generation of test result signals to determine if the DFE is suitable for specific data transition frequencies by comparing written and read data patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a fixed DFE setting is used for memory device writing operations, then the device complexity is reduced and ease of operation is improved, but the adaptability to different data transition frequencies deteriorates and manufacturing precision of data integrity worsens
Solution Approach 1:
The patent implements dynamic DFE configuration by allowing the memory controller to selectively enable or disable DFE based on the data transition frequency of incoming test data patterns. The system transitions from a static fixed setting to a dynamic adaptive setting where DFE parameters change according to the observed data characteristics, resolving the contradiction between ease of operation and adaptability.
Solution Approach 2:
The patent changes the operational parameters of DFE based on detected data transition frequencies. When high data transition frequency is detected, the system adjusts DFE parameters accordingly; when low frequency is detected, it uses different parameters. This parameter adaptation resolves the contradiction by making the system both easy to operate (automatic adjustment) and adaptable (frequency-specific optimization).
2Reliability
If DFE is applied to all writing operations regardless of data transition frequency, then data integrity is improved, but use of energy increases and productivity decreases
Solution Approach 1:
The patent applies DFE selectively rather than universally - only when the test data pattern exhibits high data transition frequency characteristics. For low frequency patterns, DFE is disabled. This partial application of DFE maintains data integrity when needed while avoiding unnecessary processing overhead that would reduce productivity, resolving the contradiction between reliability and productivity.
Solution Approach 2:
The memory controller performs self-testing by writing test data patterns and reading them back to automatically detect data transition frequencies. Based on this self-assessment, the system determines whether DFE is needed, eliminating the need for external configuration and enabling automatic optimization of both data integrity and productivity.
3Measurement precision
If test data patterns with multiple data transition frequencies are used, then measurement precision of DFE suitability is improved, but device complexity and difficulty of detecting and measuring increase
Solution Approach 1:
The patent segments the testing process into distinct phases: writing test data patterns with different frequencies, reading them back, and analyzing results separately. By dividing the complex multi-frequency testing into manageable segments, the system achieves high measurement precision without overwhelming device complexity, as each segment can be processed and evaluated independently.
Data Source
AI summary
A test method is for testing a decision feedback equalization (DFE) of a memory device is provided. The memory device includes a memory bank. The test method includes: providing a first test data pattern having a first data transition frequency and a second test data pattern having a second data transition frequency different from the first data transition frequency; writing the first test data pattern into a first memory section of the memory bank with a first DFE; writing the second test data pattern into a second memory section of the memory bank with the first DFE; reading a first reading data pattern stored in the first memory section and a second reading data pattern stored in the second memory section; and generating a test result signal according to the first reading data pattern and the second reading data pattern.