Memory Controller Discharge Stage for Suspend Error Reduction

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Solution Overview

Problem

In nonvolatile memory systems, the increasing number of memory cells in each page leads to longer programming times, causing a decrease in idle time available for read commands, and suspended programming operations can result in negative effects such as threshold voltage shifts and increased error rates due to hole accumulation, which worsens with prolonged suspend times.

Innovation Solution

A control method and controller that includes a discharge stage after the programming stage, where a clean voltage pulse is applied to isolate the select line and prevent mis-programming, allowing for efficient suspension and resumption of programming operations, thereby reducing false error rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of memory cells in each page is increased, then the storage capacity is improved, but the programming time is extended and idle time for read commands is reduced

Engineering Contradiction:
Improvenumber of memory cellsVSAvoidprogramming time
Core Design Contradiction:
Quantity of substanceVSDuration of action of moving object

Solution Approach 1:

The programming operation is divided into multiple programming stages with intermediate discharge stages. Each programming stage programs a portion of the bit-cells, followed by a discharge stage that isolates the select line. This segmentation allows the programming process to be interrupted and resumed without affecting the entire page, enabling better utilization of idle time for read commands while maintaining storage capacity.

Inventive Principle:
Principle #1Segmentation

2Loss of time

If the programming operation is suspended during programming voltage pulses, then idle time can be utilized for other operations, but threshold voltage shifts and error rates increase due to hole accumulation

Engineering Contradiction:
Improveidle time utilizationVSAvoidprogramming accuracy
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

A discharge stage is inserted before suspending the programming operation. This discharge stage applies a cleaning voltage pulse to the select line to remove accumulated holes before the suspension occurs. By performing this preliminary cleaning action, the patent prevents threshold voltage shifts and error rate increases that would otherwise occur during suspension, while still allowing idle time to be utilized for other operations.

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If the programming operation is suspended for extended periods, then more idle time can be utilized, but hole accumulation worsens and programming accuracy deteriorates

Engineering Contradiction:
Improveidle time utilizationVSAvoidprogramming accuracy
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The programming operation is structured as periodic cycles of programming stages followed by discharge stages. Each cycle programs a portion of bit-cells and then performs a discharge to clean the select line. This periodic discharge action prevents prolonged hole accumulation even when suspensions are extended, maintaining programming accuracy while maximizing idle time utilization for other operations.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The introduction of a discharge stage improves programming accuracy by reducing false error rates and maintaining the integrity of bit-cells during suspension and resumption, enhancing the robustness of memory operations.

Implementation Method 1

each memory element is configured to store a charge, voltage, or other electrical parameter to represent the data in a plurality of bit-cells (or memory elements), formed from floating-gate transistors

Methodology Applied
Scientific EffectCharge storage: Capacitance

Implementation Method 2

programming the bit-cell of the memory array with a plurality of programming voltage pulses

Methodology Applied
Scientific EffectElectrical programming: Electrical Resistance

Implementation Method 3

isolating a select line of the bit-cell of the memory array; and generating a programming voltage pulse to the bit-cell of the memory array

Methodology Applied
Scientific EffectElectrical isolation: Electrical Resistance

Data Source

PatentUS11676663B2Control method and controller of program suspending and resuming for memory
Publication Date: 2023.06.13 YANGTZE MEMORY TECH CO LTD
  • US11676663B2 patent drawing
  • US11676663B2 patent drawing
  • US11676663B2 patent drawing

AI summary

A memory system includes a memory cell array and a controller coupled to the memory cell array. The controller is configured to control applying a first program voltage to a word line to program memory cells in the memory cell array, the memory cells being coupled to the word line, and in response to receiving a suspend command, control applying a positive bias discharge voltage to the word line when the first program voltage ramps down.