Memory Controller Double Flush Metadata Storage
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Solution Overview
Problem
Existing memory systems face complexity and performance deterioration issues, particularly in efficiently processing data across multiple memory blocks and dies, leading to reduced reliability and efficiency in data storage and retrieval.
Innovation Solution
A memory system architecture that includes a controller performing double flush operations to store metadata in both memory blocks and a Unified Memory region, allowing for efficient data segmentation and meta-data updating across multiple planes, memory dies, and channels, ensuring rapid and reliable data processing even during power transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metadata is stored only in memory blocks, then device complexity is reduced, but reliability deteriorates due to potential data loss during power transitions
Solution Approach 1:
The patent implements a double flush operation that creates copies of metadata segments in two different locations: the memory device (NAND flash) and the host system (DRAM/UFS). This copying mechanism ensures that if one location fails or loses data during power transitions, the metadata can be recovered from the other location, thereby improving reliability without requiring a fundamentally complex distributed storage system
Solution Approach 2:
The patent performs preliminary flushing of metadata to both storage locations before power-off events occur. The controller completes the double flush operation, writing metadata segments to both the memory device and host memory, ensuring that data is secured in multiple locations before power is lost. This preliminary action prevents data loss and maintains reliability without requiring complex real-time synchronization mechanisms
2Reliability
If double flush operation is implemented to store metadata in both memory blocks and host memory, then reliability improves, but processing time increases
Solution Approach 1:
The patent divides metadata into multiple segments that can be processed and flushed independently. Different metadata segments can be written to different locations (memory device or host memory) based on availability and performance requirements. This segmentation allows parallel processing of different metadata portions, reducing the overall time penalty of the double flush operation while maintaining reliability through redundant storage
Solution Approach 2:
The patent allows for partial completion of the double flush operation. If one flush operation completes successfully, the system can proceed with the next operations even if the second flush is delayed or fails. This partial action approach ensures that at least some metadata redundancy is achieved without requiring both flush operations to complete perfectly, thereby reducing the effective time loss while maintaining adequate reliability
3Stability of the object's composition
If metadata is updated frequently across multiple planes and dies, then data consistency is maintained, but system complexity increases
Solution Approach 1:
The patent introduces the host system's DRAM or UFS memory as an intermediary storage location for metadata segments. Instead of directly managing complex updates across multiple planes and dies of the NAND flash, the controller can stage metadata updates in the host memory first, then synchronize to the memory device. This intermediary layer simplifies the controller's operation by providing a more accessible and uniform interface for metadata management while maintaining data consistency across the distributed memory structure
Data Source
AI summary
A memory system may include: a memory device comprising a plurality of pages, which include a plurality of memory cells coupled to a plurality of word lines, and in which data is stored, a plurality of memory blocks in which the pages are included, a plurality of planes including the memory blocks, and a plurality of memory dies in which the planes are included; and a controller including a first memory, the controller configured to perform a command operation to store data segments of user data for the command operation in the memory blocks, and store meta segments of metadata for the command operation in the memory blocks and a second memory included in the host.