Memory Controller Access Control via Dual L2P Tables
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Solution Overview
Problem
High-capacity memory devices with multiple flash memory dies face challenges in access control, particularly during random read tests, due to issues like read collision, which existing management mechanisms are unable to adequately address without introducing side effects.
Innovation Solution
A method for performing access control using additional physical address information, where the memory controller reads valid data from a source block and writes it to a destination block, updating the logical-to-physical address mapping table to include both physical addresses associated with a logical address, allowing for efficient read requests from a host device by referencing either the source or destination block based on the request type.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple channels are used to manage high-capacity flash memory dies, then the memory device capacity increases, but read collision becomes more severe
Solution Approach 1:
The patent segments the address mapping by maintaining multiple L2P tables (first L2P table and second L2P table) to store different physical address information. This segmentation allows the system to distribute read operations across different table structures, reducing read collision in high-capacity multi-die architectures while maintaining full memory capacity.
2Device complexity
If traditional L2P address mapping is used, then the memory structure is simple, but read collision cannot be effectively reduced in high-capacity architectures
Solution Approach 1:
The patent introduces an additional dimension to the address mapping structure by maintaining multiple L2P tables with different physical address information for the same logical addresses. This dimensional expansion allows the system to access data from different physical locations (different dies or blocks) for the same logical address, effectively reducing read collision without significantly increasing structural complexity.
Data Source
AI summary
A method and apparatus for performing access control of a memory device with aid of additional physical address information are provided. The method includes: during a garbage collection procedure, reading valid data from a source block and writing the valid data into a destination block; updating at least one logical-to-physical address mapping table; receiving a first read request from a host device, wherein the first read request indicates reading at a first logical address; in response to the first read request, reading the valid data of the destination block according to the second physical address associated with the first logical address; receiving a second read request from the host device, wherein the second read request indicates reading at the first logical address; and in response to the second read request, reading the valid data of the source block according to the first physical address associated with the first logical address.