Memory Controller Dummy Pulse Sequencing for Voltage Noise Control
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Solution Overview
Problem
Existing memory controllers face challenges in managing sudden changes in total current consumption by memory devices, leading to noise in voltage sources, which can affect the reliability of operations.
Innovation Solution
A memory controller that applies a dummy pulse sequentially to channels coupled to memory devices to gradually increase or decrease total current consumption, using an initial frequency lower than normal to prevent sudden changes and noise in voltage sources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory devices start operations simultaneously at normal frequency, then productivity is improved, but voltage source noise increases due to sudden current consumption changes
Solution Approach 1:
The memory controller applies dummy pulses to memory devices before starting normal operations to gradually increase current consumption. This preliminary action prevents sudden current changes that cause voltage noise, while still enabling relatively fast operation startup by using a structured warm-up sequence rather than immediate full-power operation.
Solution Approach 2:
The memory controller uses periodic dummy pulses with controlled frequency and duration to gradually warm up memory devices. This periodic action allows current consumption to increase in controlled steps rather than abruptly, reducing voltage source noise while maintaining productivity through efficient pulse scheduling.
2Object-affected harmful factors
If dummy pulses are applied sequentially to memory devices, then voltage source noise is reduced, but operation start time increases
Solution Approach 1:
The memory controller applies dummy pulses to only some memory devices simultaneously or in overlapping sequences rather than strictly one-at-a-time. This partial action approach reduces the total warm-up time while still preventing excessive current spikes, finding an optimal balance between noise reduction and speed by not requiring complete sequential warming of all devices.
3Object-affected harmful factors
If clock signal frequency is reduced to initial frequency, then current consumption changes are smoothed, but operation speed decreases
Solution Approach 1:
The memory controller dynamically adjusts clock signal frequency, starting with a lower initial frequency during the dummy pulse warm-up period and then transitioning to normal operating frequency. This dynamic frequency adjustment smooths current consumption changes during startup while minimizing the impact on overall operation speed, as the low-frequency period is limited to the warm-up phase only.
Data Source
AI summary
A memory controller may include: a request checker identifying memory devices corresponding to requests received from a host among the plurality of memory devices and generating device information on the identified memory devices to perform operations corresponding to the requests; a dummy manager outputting a request for controlling a dummy pulse to be applied to channels of selected memory devices according to the device information among the plurality of channels; and a dummy pulse generator sequentially applying the dummy pulse to the channels coupled to the selected memory devices, based on the request for controlling the dummy pulse. A memory controller may include an idle time monitor outputting an idle time interval of the memory device and a clock signal generator generating a clock signal based on the idle time interval and outputting the clock signal to the memory device through the channel to perform a current operation.