Memory Controller Dummy Pulse Sequencing for Voltage Noise Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory controllers face challenges in managing sudden changes in total current consumption by memory devices, leading to noise in voltage sources, which can affect the reliability of operations.
Innovation Solution
A memory controller that applies a dummy pulse sequentially to channels coupled to memory devices to gradually increase or decrease total current consumption, preventing sudden changes and noise in voltage sources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory devices start operations simultaneously, then operation speed is improved, but total current consumption changes suddenly causing noise in voltage sources
Solution Approach 1:
The memory controller applies dummy pulses to memory devices before actual operations to pre-activate their internal circuits. This preliminary action ensures that when actual operations start, the memory devices are already in a ready state, allowing simultaneous operations without sudden current consumption changes that would cause voltage source noise
Solution Approach 2:
Dummy pulses serve as an intermediary mechanism between the memory controller and memory devices. These dummy pulses gradually activate the memory devices' internal circuits before actual data operations, mediating the transition from idle to active state and preventing abrupt current changes that would disrupt voltage source stability
2Reliability
If dummy pulses are applied to all channels simultaneously, then current consumption is gradually increased, but noise may still occur in voltage sources
Solution Approach 1:
The memory controller divides the dummy pulse application into separate segments for each channel rather than applying them all at once. By sequentially applying dummy pulses to different channels, the controller further segments the current consumption increase, preventing even moderate noise that would result from applying dummy pulses to all channels simultaneously
Data Source
AI summary
A memory controller may include: a request checker identifying memory devices corresponding to requests received from a host among the plurality of memory devices and generating device information on the identified memory devices to perform operations corresponding to the requests; a dummy manager outputting a request for controlling a dummy pulse to be applied to channels of selected memory devices according to the device information among the plurality of channels; and a dummy pulse generator sequentially applying the dummy pulse to the channels coupled to the selected memory devices, based on the request for controlling the dummy pulse. A memory controller may include an idle time monitor outputting an idle time interval of the memory device and a clock signal generator generating a clock signal based on the idle time interval and outputting the clock signal to the memory device through the channel to perform a current operation.