Memory Controller Dummy Pulse Sequencing for Voltage Noise

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Solution Overview

Problem

Existing memory controllers face challenges in managing the rapid increase and decrease of total current consumption by memory devices, leading to noise in voltage sources and potential operational reliability issues when multiple devices start or end operations simultaneously.

Innovation Solution

A memory controller and operating method that apply a dummy pulse sequentially to channels connected to memory devices, allowing them to start or stop operations in a coordinated manner, thereby managing current consumption and minimizing noise in voltage sources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple memory devices start or end operations simultaneously, then operational efficiency is improved, but total current consumption changes rapidly causing noise in voltage sources

Engineering Contradiction:
Improveoperational efficiencyVSAvoidnoise in voltage sources
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The memory controller applies dummy pulses to memory devices before they actually start operations. This preliminary action gradually increases current consumption in advance, preventing sudden current spikes when multiple devices start simultaneously, thereby reducing noise in voltage sources while maintaining operational efficiency

Inventive Principle:
Principle #10Preliminary action

2Object-affected harmful factors

If dummy pulses are applied to memory devices, then current consumption changes are smoothed reducing noise, but device complexity increases

Engineering Contradiction:
Improvenoise reductionVSAvoidcontroller complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The memory controller monitors its own current consumption patterns and automatically applies dummy pulses when detecting potential rapid current changes. This self-service mechanism manages noise reduction without requiring external intervention or complex external circuitry, balancing noise reduction with acceptable controller complexity

Inventive Principle:
Principle #25Self-service

3Object-affected harmful factors

If dummy pulses are applied sequentially to memory devices, then current consumption is managed effectively, but operational latency increases

Engineering Contradiction:
Improvecurrent consumption managementVSAvoidoperational latency
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The memory controller applies dummy pulses to only those memory devices that will be actively operated soon, rather than to all devices. This partial action approach manages current consumption effectively while minimizing the total time overhead, reducing operational latency compared to applying dummy pulses universally

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12051470B2Memory controller and operating method thereof
Publication Date: 2024.07.30 SK HYNIX INC
  • US12051470B2 patent drawing
  • US12051470B2 patent drawing
  • US12051470B2 patent drawing

AI summary

A memory controller capable of sequentially increasing or decreasing a total current consumed by a plurality of memory devices, controls a plurality of memory devices coupled through a plurality of channels. The memory controller includes a request checker for identifying memory devices corresponding to requests received from a host among the plurality of memory devices, and generating the identified device information on memory devices to perform operations corresponding to the requests; a dummy manager for outputting a request for controlling a dummy pulse to be applied to channels of selected memory devices according to the device information among the plurality of channels; and a dummy pulse generator for sequentially applying the dummy pulse to the channels coupled to the selected memory devices, based on the request for controlling the dummy pulse.