Memory Controller Error Correction Using Dynamic Read Voltages
Solution Overview
Problem
Existing memory controllers face inefficiencies in error correction operations due to unexpected changes in threshold voltage distributions within memory devices, leading to errors during read operations, which are not effectively addressed by current error correction methods.
Innovation Solution
A memory controller with an error corrector that performs multiple error correction operations, including history read, read retry, eboost, and assist read operations, using optimized read voltages determined based on ideal threshold voltage distributions to correct errors, and an eboost data controller for storing data from eboost operations to improve error correction efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error correction operations are performed using fixed read voltages, then the error correction process is simple, but error correction efficiency deteriorates when threshold voltage distributions change unexpectedly
Solution Approach 1:
The patent implements dynamic error correction by sequentially performing multiple error correction operations (first error correction operation, second error correction operation, and eboost operation) with different read voltages. The system adapts to changing threshold voltage distributions by switching between different correction methods based on whether errors are detected, transforming the static error correction process into a dynamic multi-stage system that maintains high efficiency under varying conditions.
Solution Approach 2:
The patent changes the read voltage parameter across different error correction operations. The first error correction operation uses an initial read voltage, the second operation uses a modified read voltage, and the eboost operation uses a specifically optimized read voltage. This parameter variation allows the system to effectively correct errors caused by threshold voltage distribution shifts without requiring a complete redesign of the error correction mechanism.
2Reliability
If multiple error correction operations are performed to improve error correction efficiency, then error correction reliability is improved, but operation time increases
Solution Approach 1:
The patent performs a first error correction operation before a second error correction operation, and performs eboost operations preliminarily to prepare optimized read voltages. By executing error correction operations in a predetermined sequence and performing preliminary corrections, the system reduces the need for repeated assist read operations, thereby decreasing total operation time while maintaining high error correction reliability through the multi-stage approach.
Solution Approach 2:
The patent enables the memory controller to skip unnecessary assist read operations by effectively performing error correction through the sequence of first error correction operation, second error correction operation, and eboost operation. When errors are successfully corrected in the earlier stages, the system can rush through to data retrieval without time-consuming additional assist reads, thereby reducing overall operation time while maintaining correction reliability.
3Reliability
If assist read operations are frequently performed to correct errors, then error correction completeness is improved, but productivity deteriorates due to time consumption
Solution Approach 1:
The patent performs first and second error correction operations preliminarily to address errors before they require assist read operations. By executing these preliminary correction operations with different read voltages, the system resolves many errors in advance, reducing the frequency of time-consuming assist read operations and thereby improving overall memory operation productivity while maintaining correction completeness.
Solution Approach 2:
The patent enables the system to skip assist read operations by effectively correcting errors through the eboost operation that uses read voltages determined based on ideal threshold voltage distributions. When the eboost operation successfully corrects errors, the system can rush through to complete the read operation without performing additional assist reads, thus improving productivity while maintaining error correction completeness.
4Measurement precision
If read voltages are optimized based on ideal threshold voltage distributions, then error correction accuracy is improved, but device complexity increases
Solution Approach 1:
The patent determines read voltages for eboost operations based on ideal threshold voltage distributions, changing the voltage parameter to match expected threshold distributions. This parameter optimization improves error correction accuracy by aligning read voltages with ideal conditions, while the systematic approach to voltage determination keeps the increase in device complexity manageable through structured voltage selection.
Data Source
AI summary
A memory controller performs an efficient error correction operation. The memory controller controls a memory device. The memory controller includes: an error corrector configured to perform one or more error correction operations to correct an error included in data read from the memory device during a read operation, the one or more error correction operations including a first error correction operation performed using a first read voltage determined based on a threshold voltage distribution obtained by assuming that a number of memory cells in an erase state is equal to a number of memory cells in a program state and a data controller in communication with the error corrector to receive first error correction data obtained from the first error correction operation and configured to store the first error correction data in the memory controller.