Memory Controller ECC Encoding for Read Reliability
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Solution Overview
Problem
Non-volatile flash memory devices face challenges in accurately reading data due to overlapping threshold voltage distributions, leading to increased error bits as the number of bits programmed in each memory cell increases, causing reliability issues and read failures.
Innovation Solution
A controller and operating method that generates internal and external parities through ECC encoding to accurately read data from memory cells, using meta data and error correction decoding to ensure reliable data retrieval even when initial decoding fails.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of bits programmed in each memory cell increases (MLC, TLC), then the data storage capacity and integration density improve, but the threshold voltage distributions overlap and read failure rate increases
Solution Approach 1:
The patent divides the data storage and error correction process into multiple independent ECC codes (first ECC code, second ECC code, third ECC code) that operate on different portions or aspects of the data. This segmentation allows each code to handle specific error patterns independently, improving overall reliability without reducing storage capacity.
Solution Approach 2:
The patent applies multiple ECC encoding operations before data is written to memory cells. By performing preliminary error correction encoding with multiple different ECC codes, the system proactively prepares for potential read failures caused by threshold voltage overlap, enabling recovery even when initial reads fail.
2Reliability
If multiple ECC codes are applied to correct errors, then the read reliability improves, but the device complexity and processing overhead increase
Solution Approach 1:
The patent implements a dynamic error correction process where the controller adaptively selects and applies different ECC codes based on the specific error conditions detected during reading. The system can adjust which ECC decoding path to follow (first, second, or third ECC code) depending on the severity and type of errors encountered, optimizing the balance between reliability and complexity.
Solution Approach 2:
The patent introduces multiple intermediate ECC codes as mediators between the raw data and the final corrected data. Each ECC code acts as an intermediate layer of protection, and the controller can use these intermediaries in sequence or combination to achieve reliable data recovery without requiring a single overly complex error correction mechanism.
Data Source
AI summary
An operating method of a controller that controls a memory device, comprises: generating a data chunk including user data to be programmed in a page of the memory device and an internal parity generated by performing first ECC encoding on the user data, the internal parity being generated when a size of the user data is smaller than a size of a data area of the page, generating a page chunk including the data chunk, meta data of the user data and an external parity generated by performing second ECC encoding on the meta data and the data chunk, and controlling the memory device to program the page chunk into the page.