Memory Controller ECC-LDPC Checking for Faster Reliable Data Transfer
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Solution Overview
Problem
Existing memory systems face challenges in increasing the reliability of data transfer operations while reducing the overall operation time, particularly in non-volatile memory devices used in portable electronic devices.
Innovation Solution
A controller is implemented with an ECC encoder, buffer, LDPC encoder, and syndrome checkers to add and verify parities, enhancing data reliability through encryption, error correction, and syndrome checks during write and read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple error check operations (ECC, LDPC, syndrome check) are performed on data, then data reliability is improved, but operation time increases
Solution Approach 1:
The patent applies preliminary action by performing error check operations (ECC encoding, LDPC encoding, syndrome check) on data during the write operation before data is stored in the memory device. This ensures that errors are detected and corrected in advance, improving data reliability while allowing the memory system to operate efficiently without delays during read operations.
2Reliability
If multiple error check operations (ECC, LDPC, syndrome check) are performed on data, then data reliability is improved, but the complexity of the controller increases
Solution Approach 1:
The patent merges multiple error check functions (ECC encoder, LDPC encoder, syndrome checker) into a single controller unit. This integration allows the controller to perform comprehensive error checking (combining multiple protection mechanisms) while managing the complexity through unified control logic, rather than having separate independent systems for each error check operation.
3Reliability
If multiple parities are added to data through ECC and LDPC encoding, then error correction capability is improved, but data transfer time increases
Solution Approach 1:
The patent applies preliminary action by adding multiple parities (ECC parity and LDPC parity) to data during the write operation before storage. This ensures that comprehensive error correction capability is built into the data structure in advance, enabling fast and reliable data retrieval during read operations without compromising data transfer speed.
Data Source
AI summary
A controller includes an Error Correction Code (ECC) encoder adding a first parity to data to generate a data set, and encoding the data set to generate a first parity data set, a buffer temporarily storing the first parity data set, an ECC decoder decoding the first parity data set received from the buffer to generate a decoded data set, a first checker performing a Low Density Parity Check (LDPC) encoding on the decoded data set to generate an LDPC data set to which a second parity is added, and a second checker performing a syndrome check operation on the LDCP data set including the first and second parities.