Memory Controller ECC-LDPC Flow for Faster Reliable Data Transfer
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Solution Overview
Problem
Existing memory systems face challenges in increasing the reliability of data transfer operations while reducing the overall operation time, particularly in non-volatile memory devices used in portable electronic devices.
Innovation Solution
A controller is implemented with Error Correction Code (ECC) encoders and decoders, Low Density Parity Check (LDPC) encoding, and syndrome check operations to enhance data reliability by adding multiple parities and performing error checks during write and read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple error check operations (ECC, LDPC, syndrome check) are performed sequentially on data, then data reliability is improved, but operation time increases
Solution Approach 1:
The patent performs LDPC encoding on parity data in advance during write operations, so that when read operations occur, the error checking can be done more quickly without having to perform all encoding operations at that moment. This preliminary preparation reduces the time penalty associated with multiple error check operations.
Solution Approach 2:
The patent divides error checking into multiple stages: ECC encoding/decoding, LDPC encoding, and syndrome checking. By segmenting the error checking process into distinct operational phases (write-time preparation vs. read-time verification), the system can overlap operations and reduce overall operation time while maintaining comprehensive data reliability checks.
2Productivity
If multiple buffers are added to store intermediate data during error checking, then data transfer efficiency is improved, but device complexity increases
Solution Approach 1:
The patent makes the buffer component multi-functional by using it to store both user data and parity data at different times during the error checking process. Instead of adding separate dedicated buffers for each data type, the same buffer resource is reused flexibly, improving data transfer efficiency without increasing device complexity.
Solution Approach 2:
The patent combines the storage function for user data and parity data into a single buffer component. By merging these storage functions, the system achieves efficient data transfer through unified buffer management while avoiding the complexity increase that would result from multiple separate buffer components.
Data Source
AI summary
A controller includes an Error Correction Code (ECC) encoder adding a first parity to data to generate a data set, and encoding the data set to generate a first parity data set, a buffer temporarily storing the first parity data set, an ECC decoder decoding the first parity data set received from the buffer to generate a decoded data set, a first checker performing a Low Density Parity Check (LDPC) encoding on the decoded data set to generate an LDPC data set to which a second parity is added, and a second checker performing a syndrome check operation on the LDCP data set including the first and second parities.