Memory Controller ECC-LDPC Pipeline for Faster Reliable Writes
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Solution Overview
Problem
Current data path protection technologies in memory systems face challenges in increasing data reliability while reducing operation time during write operations in non-volatile memory devices.
Innovation Solution
A controller is implemented that uses Error Correction Code (ECC) encoding, Low Density Parity Check (LDPC) encoding, and syndrome checks to add and verify parities, ensuring data integrity and reliability during data transfer between a host and a non-volatile memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple encoding and checking operations are performed sequentially to ensure data reliability, then data reliability is improved, but operation time increases
Solution Approach 1:
The patent applies preliminary action by performing LDPC encoding on the first parity data set before the syndrome check operation is completed. The controller encodes the first parity data set using LDPC encoding to generate a second parity data set, and then performs the syndrome check on this second parity data set. This reordering allows overlapping of encoding and checking operations, reducing the total operation time while maintaining data reliability through multiple encoding and checking stages.
2Reliability
If multiple buffers are added to store intermediate data sets, then data transfer reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by making the buffer serve multiple functions. The buffer is used to temporarily store both the first parity data set and the second parity data set during the data transfer process. Instead of adding separate buffers for each intermediate data set, the same buffer resource is reused across different stages of the encoding and checking operations, reducing device complexity while maintaining data transfer reliability.
3Ease of manufacture
If traditional sequential processing is used for encoding and checking operations, then ease of implementation is maintained, but productivity decreases
Solution Approach 1:
The patent applies dynamics by making the processing pipeline adaptive and overlapping. Instead of rigid sequential processing, the controller dynamically overlaps the LDPC encoding operation with the syndrome check operation. The system performs LDPC encoding on the first parity data set while simultaneously preparing for and executing the syndrome check on the resulting second parity data set. This dynamic overlapping increases productivity without significantly complicating the implementation, as it builds upon the existing sequential processing framework.
Data Source
AI summary
A controller includes an Error Correction Code (ECC) encoder adding a first parity to data to generate a data set, and encoding the data set to generate a first parity data set, a buffer temporarily storing the first parity data set, an ECC decoder decoding the first parity data set received from the buffer to generate a decoded data set, a first checker performing a Low Density Parity Check (LDPC) encoding on the decoded data set to generate an LDPC data set to which a second parity is added, and a second checker performing a syndrome check operation on the LDCP data set including the first and second parities.