Memory Controller ECC Logging for NVDIMM Backup Integrity
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Solution Overview
Problem
Software-based NVDIMMs (NVDIMM-SWs) face challenges in ensuring data integrity during backup operations, particularly when in System Management Mode (SMM), as they cannot detect or correct memory errors, leading to uncertainty about data integrity upon system reset.
Innovation Solution
Implementing a machine check register to store error checking data, which is scanned by the main processor during backup operations, allowing for continuous error checking and logging of integrity issues, ensuring data integrity is maintained even when in SMM.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If NVDIMM-SWs are used to emulate hybrid memory functions with independent volatile and non-volatile memory, then cost is reduced compared to hardware-based NVDIMM-Ns, but data integrity cannot be ensured during backup operations when in System Management Mode
Solution Approach 1:
The patent applies preliminary action by implementing error detection and logging mechanisms before backup operations complete. The system proactively detects potential data integrity issues during the backup process and logs them in advance, so that when the backup finishes or the system resets, the integrity status is already known and can be acted upon without requiring complex post-backup verification procedures.
Solution Approach 2:
The patent uses an intermediary approach by introducing a logging mechanism that acts as a mediator between the backup operation and the integrity verification process. The log file serves as an intermediary record that captures error information during backup, allowing the system to separate the backup function from the integrity verification function, thereby simplifying the overall system architecture while maintaining reliability.
2Reliability
If the main processor enters System Management Mode to handle memory errors, then memory errors can be detected and corrected, but the processor cannot perform normal operations including operating system execution, creating operational downtime
Solution Approach 1:
The patent applies preliminary action by detecting and logging errors during backup operations before they disrupt normal system operation. By proactively identifying data integrity issues during the backup process and recording them in advance, the system prevents unexpected errors from occurring during critical operations, thereby maintaining continuous productivity while still ensuring error detection capability.
Solution Approach 2:
The patent implements feedback by continuously monitoring backup operations and logging error information in real-time. This feedback mechanism allows the system to track data integrity status without interrupting normal processor operations, enabling the system to maintain both error detection capability and operational efficiency through continuous information flow rather than interruptive error handling.
3Reliability
If error checking bits are stored in DRAM alongside data bits, then data integrity can be verified through EDC or ECC codes, but additional memory space is required increasing the memory module capacity
Solution Approach 1:
The patent applies copying by creating a log file that replicates error information separately from the main data storage. Instead of requiring additional error checking bits in the primary memory array, the system copies relevant integrity information into a dedicated log structure during backup operations, thereby maintaining data integrity verification capability without increasing the capacity requirements of the main memory modules.
Data Source
AI summary
Embodiments of ensuring data integrity in computing devices and associated methods of operations are disclosed therein. In one embodiment, a method includes receiving, at a memory controller, a data request from the persistent storage to copy data from the memory. In response to the received data request, the requested data is retrieved from the memory. The retrieved data contains data bits and corresponding error correcting bits. The method can also include determining, at the memory controller, whether the retrieved data bits contain one or more data integrity errors based on the error correcting bits associated with the data bits. In response to determining that the retrieved data bits contain one or more data integrity errors, the memory controller can write data representing existence of the one or more data integrity errors into a memory location accessible by the processor for ensuring data integrity.