Memory Controller ECC Loop Control for Low-Power Data Integrity

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Solution Overview

Problem

Existing storage devices face challenges in achieving low power consumption while maintaining effective error correction and data integrity, particularly in nonvolatile memory systems used in mobile devices.

Innovation Solution

Incorporating an error correction code block with an internal buffer and a memory controller that performs iterative error correction and estimation operations, along with a checker for data integrity, to optimize power usage and enhance data correction efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction operations are performed iteratively to ensure data integrity, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improvedata integrityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The error correction process dynamically adjusts the number of iterative operations based on the actual error conditions detected in the data. The system performs estimation operations to determine error counts and selectively executes additional error correction iterations only when errors exceed threshold values, rather than always performing fixed iterative corrections. This dynamic adaptation resolves the contradiction by maintaining reliability through targeted error correction while reducing unnecessary power consumption from redundant operations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters (number of error correction iterations) based on detected error conditions. By monitoring error counts from estimation operations and comparing them against threshold values, the system adjusts the intensity and duration of error correction processing. This parameter-based control ensures adequate error correction for maintaining data integrity while optimizing power consumption by avoiding excessive iterative operations when errors are within acceptable ranges.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If comprehensive error correction and integrity checking are performed, then reliability is improved, but processing time increases

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs partial error correction actions based on estimated error levels. When error counts from estimation operations are within threshold values, the system performs minimal or no additional error correction iterations, relying on initial correction passes. Only when errors exceed thresholds does the system perform comprehensive iterative error correction. This partial action approach maintains data integrity for most cases while significantly reducing processing time by avoiding unnecessary comprehensive corrections.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system implements feedback mechanisms through estimation operations that monitor error counts and provide information to control subsequent error correction actions. The feedback loop compares estimated error counts against threshold values and dynamically adjusts the extent of error correction processing. This feedback-based control ensures reliable error correction when needed while minimizing processing time by stopping corrections when error levels are acceptable, resolving the contradiction between reliability and processing time.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250383957A1Storage device and operating method of storage device
Publication Date: 2025.12.18 SAMSUNG ELECTRONICS CO LTD
  • US20250383957A1 patent drawing
  • US20250383957A1 patent drawing
  • US20250383957A1 patent drawing

AI summary

An example storage device includes a nonvolatile memory device and a memory controller. The memory controller includes an internal buffer storing first data read from the nonvolatile memory device and an error correction code block reading the first data from the internal buffer and correcting an error of the first data. The error correction code block performs an error correction operation of performing an error correction loop for the data and an estimation operation of estimating a residual error from second data experiencing the error correction loop. When the number of errors estimated in the estimation operation is greater than a threshold value, the error correction code block further performs the error correction operation and the estimation operation.