Memory Controller Mode Switching for ECC Spare DIMM RAS
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Solution Overview
Problem
High-end computing systems require a higher level of recoverability, availability, and serviceability (RAS) which is not met by standard dual channel DRAM DIMMs optimized for lower end computer systems, leading to increased system costs due to the need for customized DIMMs.
Innovation Solution
A memory controller that can switch between dual channel and single channel modes, utilizing a spare ECC memory device to provide RAS capabilities, allowing a standard dual channel DIMM to function as a single channel DIMM with a spare memory device, thereby reducing costs while maintaining high RAS levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard dual channel DRAM DIMMs are used, then cost is reduced, but RAS (recoverability, availability, serviceability) level is insufficient for high-end computing systems
Solution Approach 1:
The memory controller dynamically switches between dual channel mode and single channel mode with spare. In dual channel mode, both channels operate normally for maximum performance. When a failure is detected, the system dynamically transitions to single channel mode where one channel serves as spare, thereby adapting to changing system conditions and maintaining RAS without requiring custom DIMMs
Solution Approach 2:
The system changes operational parameters by switching memory configuration modes. The memory controller modifies channel configuration parameters, transitioning from dual channel operation to single channel operation with spare, thereby changing the system's RAS characteristics without hardware modification
2Reliability
If customized DIMMs with spare memory devices are implemented, then RAS level is improved, but device complexity and cost increase
Solution Approach 1:
The memory controller provides multiple functions: it operates as a dual channel controller for normal operation and as a single channel controller with spare when needed. The same standard DIMM serves multiple purposes - acting as both operational channels and potential spare, eliminating the need for customized DIMMs designed for a single function
Solution Approach 2:
The system uses its own existing memory resources (one of the two channels) to provide spare functionality. Rather than requiring external custom DIMMs, the system reconfigures its existing components to serve as spare, making the RAS capability self-provided
3Productivity
If dual channel mode operates continuously, then performance is maximized, but fault tolerance is reduced
Solution Approach 1:
The system dynamically adjusts its operational mode based on system conditions. During normal operation, dual channel mode provides maximum performance. Upon detecting a failure, the system dynamically switches to single channel mode with spare, thereby adapting performance characteristics to match the current fault tolerance requirements
Data Source
AI summary
A technique relates to operating a memory controller. The memory controller drives first memory devices and second memory devices of the memory controller in a dual channel mode. A first error correcting code (ECC) memory device and a second ECC memory device protect the first memory devices and the second memory devices. The memory controller drives the first memory devices and the second memory devices in a single channel mode such that the second ECC memory device is a spare memory device, and the first ECC memory device protects the first memory devices and the second memory devices. The memory controller is configured to switch between the dual channel mode and the single channel mode.