Memory Controller Erase Mode Switching for Stable Data Retention

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Solution Overview

Problem

Existing storage devices face challenges in achieving efficient and reliable erase operations, particularly in volatile and nonvolatile memory devices, leading to issues such as over-erasure or shallow erasure, which affect data retention and device performance.

Innovation Solution

A memory controller is introduced with a status information storage and operation controller that determines an operation mode based on status information, allowing for a pre-program operation before an erase operation in unstable conditions and skipping it in stable conditions, thereby optimizing erase performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a pre-program operation is performed before an erase operation, then erase reliability is improved, but erase time is increased

Engineering Contradiction:
Improveerase reliabilityVSAvoiderase time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing a pre-program operation before the erase operation when the memory block is in an unstable state. This pre-programming step prepares the memory block by programming all blocks to a first program state, which ensures that subsequent erase operations are reliable and prevent over-erasure or shallow erasure. The controller determines whether to execute this preliminary action based on the operational stability status of the memory block.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a pre-program operation is performed before an erase operation, then data retention is improved, but operation complexity is increased

Engineering Contradiction:
Improvedata retentionVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements feedback by having the controller continuously monitor the operational stability status of memory blocks and use this information to determine whether to execute the pre-program operation before erasure. The controller receives status information indicating whether the memory block is in a stable or unstable state, and accordingly adjusts the erase operation sequence. This feedback mechanism ensures that the additional operational step is only performed when necessary, optimizing both data retention and operational simplicity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20260050384A1Storage device and method of operating the same
Publication Date: 2026.02.19 SK HYNIX INC
  • US20260050384A1 patent drawing
  • US20260050384A1 patent drawing
  • US20260050384A1 patent drawing

AI summary

Provided herein are a storage device and a method of operating the same. A memory controller having improved erase performance may include a status information storage and an operation controller. The status information storage may be configured to store status information of a memory block or the memory controller. The operation controller may be configured to determine an operation mode for an erase operation on the memory block based on the status information, and control a memory device to sequentially perform a pre-program operation and the erase operation, or perform the erase operation, depending on the operation mode.