Memory Controller Erase Voltage Optimization

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Solution Overview

Problem

Current memory controllers lack efficient methods to determine optimal operating voltages for program and erase operations in memory devices, leading to variability in performance and reliability across different memory cells.

Innovation Solution

A memory controller that calculates program and erase operating times and uses a lookup table to determine appropriate voltages based on these times, adjusting voltages by adding or subtracting an offset from default values to optimize operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed erase voltage is used for all memory blocks, then the control logic is simple, but the erase operation reliability varies across different memory cells due to program time variations

Engineering Contradiction:
Improveerase operation reliabilityVSAvoidvoltage determination complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent stores program operating times for each word line in advance in an operating time storage unit before erase operations are performed. When erasing, the controller retrieves the pre-stored program operating time for the target word line and uses it to determine the appropriate erase voltage, eliminating the need for real-time measurement and complex calculations during the erase operation itself.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a lookup table that maps program operating times to corresponding erase voltages. This table is generated in advance and stored in the memory controller, allowing the controller to quickly determine the appropriate erase voltage by simply looking up the value in the table based on the program operating time, rather than performing complex voltage calculations during erase operations.

Inventive Principle:
Principle #26Copying

2Reliability

If program operating times are measured and stored for each word line, then erase voltage can be optimized for each word line, but the memory controller complexity increases

Engineering Contradiction:
Improveprogram and erase operation reliabilityVSAvoidmemory controller structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the memory block into multiple word lines and measures/stores program operating times for each word line separately. This segmentation allows the controller to determine appropriate erase voltages for each word line based on its specific program operating time, rather than using a single voltage for all word lines, thereby improving overall erase reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the erase voltage parameter based on the program operating time parameter. By establishing a relationship between these two parameters (stored in the lookup table), the controller can dynamically adjust the erase voltage to match the actual program characteristics of each word line, improving operation reliability without requiring complex real-time control logic.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If default erase voltage is used without adjustment, then the operation is fast, but it does not account for variations in program operating times across different word lines

Engineering Contradiction:
Improveerase operation consistencyVSAvoidvoltage determination time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs voltage determination in advance by storing program operating times for all word lines before erase operations. The lookup table is generated beforehand, so during actual erase operations, the controller only needs to retrieve the pre-stored voltage value corresponding to the target word line's program operating time, minimizing real-time determination time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a lookup table that copies the relationship between program operating times and optimal erase voltages into a readily accessible format. This table allows the controller to quickly determine the appropriate erase voltage by simple table lookup rather than complex calculations, significantly reducing the time required for voltage determination during erase operations.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS11600334B2Memory controller
Publication Date: 2023.03.07 MIMIRIP LLC
  • US11600334B2 patent drawing
  • US11600334B2 patent drawing
  • US11600334B2 patent drawing

AI summary

In a memory controller for controlling a memory device including a memory block coupled to a plurality of word lines, the memory block including a plurality of memory cells respectively coupled to the plurality of word lines, the memory controller comprising: an operating time calculator configured to calculate program operating times taken to perform a program operation on the memory cells respectively coupled to the plurality of word lines; and an operating voltage determiner configured to determine an erase voltage to be used to erase a memory block by comparing a first program operating time, among the program operating times calculated by the operating time calculator, with the other program operating times, except the first program operating time, among the program operating times.