Memory Controller Erasing Mode Adaptation for Power Stability
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Solution Overview
Problem
The existing memory controlling methods for rewritable non-volatile memory modules face instability due to inadequate power supply when executing erase commands, particularly in interleave or parallel data writing modes, where simultaneous enablement of memory dies can lead to power insufficiency.
Innovation Solution
A memory controlling method that identifies the transmission mode between the memory storage apparatus and the host system, applying a first erasing mode that enables multiple memory die groups simultaneously when power is adequate and a second erasing mode that enables only one group at a time when power is limited, to manage power consumption and prevent instability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple memory dies are enabled simultaneously in interleave or parallel writing mode, then data writing speed is improved, but power consumption increases causing write failure
Solution Approach 1:
The memory dies are divided into multiple groups, and the controller manages different groups with different enabling strategies. During write operations, multiple groups can be enabled simultaneously to maintain high writing speed, while during erase operations, only one group is enabled at a time to control power consumption within available limits.
Solution Approach 2:
The controller dynamically adjusts the number of enabled memory die groups based on the operation type (write or erase) and available power. For write operations, more groups are enabled to maximize speed; for erase operations, fewer groups are enabled to stay within power constraints, creating a dynamic adaptation to operational requirements.
2Productivity
If multiple memory die groups are enabled simultaneously for erasing, then erasing speed is improved, but power insufficiency causes system instability
Solution Approach 1:
Memory dies are segmented into multiple groups that can be managed independently during erase operations. By dividing the erase workload across multiple groups that operate sequentially rather than simultaneously, the system achieves improved erasing speed while controlling peak power consumption to maintain stability.
Solution Approach 2:
The controller implements periodic enablement of different memory die groups during erase operations. Instead of enabling all groups simultaneously, it enables them in periodic sequences, allowing power consumption to remain within available limits while still achieving faster overall erasing compared to single-group operation.
3Productivity
If power is increased to support simultaneous erase operations, then erasing performance is improved, but the data transmission interface cannot provide adequate power
Solution Approach 1:
The controller dynamically adapts the erase operation strategy based on available power from the data transmission interface. When power is limited, it switches to sequential enablement of memory die groups; when power is充足, it can enable more groups simultaneously, optimizing erasing performance within the constraints of the power supply capability.
Solution Approach 2:
The system changes operational parameters (number of simultaneously enabled memory die groups) based on power availability. By adjusting this parameter dynamically, the system achieves the best possible erasing performance given the power constraints of the data transmission interface, without requiring additional power supply infrastructure.
Data Source
AI summary
A memory controlling method, a memory controller and a memory storage apparatus are provided. The method includes identifying whether a transmission mode between the memory storage apparatus and a host system belongs to a first transmission mode or a second transmission mode and grouping memory dies of the memory storage apparatus into a plurality of memory die groups. The method also includes applying a first erasing mode to erase data stored in the memory dies when the transmission mode belongs to the first transmission mode and applying a second erasing mode to erase the data stored in the memory dies when the transmission mode belongs to the second transmission mode, wherein at least a part of the memory die groups are enabled simultaneously in the first erasing mode and any two of the memory die groups are not enabled simultaneously in the second erasing mode.